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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-17 23:50:23 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-17 23:50:23 -0800 |
| commit | ec93209f51afc09e273a4742dc0b5f2cefc15e76 (patch) | |
| tree | 6bf54fc3fd13c57abca9db8424a52155be95f848 /src/target/arm7_9_common.c | |
| parent | d6c8945662e6027f6ba12d73bac2473088672db5 (diff) | |
| download | openocd+libswd-ec93209f51afc09e273a4742dc0b5f2cefc15e76.tar.gz openocd+libswd-ec93209f51afc09e273a4742dc0b5f2cefc15e76.tar.bz2 openocd+libswd-ec93209f51afc09e273a4742dc0b5f2cefc15e76.tar.xz openocd+libswd-ec93209f51afc09e273a4742dc0b5f2cefc15e76.zip | |
ARM: add arm_mode_name()
Add and use arm_mode_name() to map from PSR bits to user
meaningful names. It uses a new table which, later, can
be used to hold other mode-coupled data.
Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8. The
previous mode name scheme didn't understand that mode.
Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/arm7_9_common.c')
| -rw-r--r-- | src/target/arm7_9_common.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index b29eb5cc..ff95a0cd 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -1420,7 +1420,8 @@ static int arm7_9_debug_entry(struct target *target) return ERROR_TARGET_FAILURE; } - LOG_DEBUG("target entered debug state in %s mode", armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)]); + LOG_DEBUG("target entered debug state in %s mode", + arm_mode_name(armv4_5->core_mode)); if (armv4_5->core_state == ARMV4_5_STATE_THUMB) { @@ -1613,7 +1614,8 @@ int arm7_9_restore_context(struct target *target) */ for (i = 0; i < 6; i++) { - LOG_DEBUG("examining %s mode", armv4_5_mode_strings[i]); + LOG_DEBUG("examining %s mode", + arm_mode_name(armv4_5->core_mode)); dirty = 0; mode_change = 0; /* check if there are dirty registers in the current mode @@ -1675,7 +1677,10 @@ int arm7_9_restore_context(struct target *target) num_regs++; reg->dirty = 0; reg->valid = 1; - LOG_DEBUG("writing register %i of mode %s with value 0x%8.8" PRIx32 "", j, armv4_5_mode_strings[i], regs[j]); + LOG_DEBUG("writing register %i mode %s " + "with value 0x%8.8" PRIx32, j, + arm_mode_name(armv4_5->core_mode), + regs[j]); } } |