summaryrefslogtreecommitdiff
path: root/src/target/arm7tdmi.c
diff options
context:
space:
mode:
authorDavid Brownell <dbrownell@users.sourceforge.net>2010-02-21 14:34:33 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2010-02-21 14:34:33 -0800
commit1aac72d24339380f6e98c50dec4c96ab30537749 (patch)
treeefd8b83082f072d807f168eabf415e1002cf5425 /src/target/arm7tdmi.c
parenta299371a9ec109da3851cb43aed3e9157d095358 (diff)
downloadopenocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.tar.gz
openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.tar.bz2
openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.tar.xz
openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.zip
ARM: keep a handle to the PC
Keep a handle to the PC in "struct arm", and use it. This register is used a fair amount, so this is a net minor code shrink (other than some line length fixes), but mostly it's to make things more readable. For XScale, fix a dodgy sequence while stepping. It was initializing a variable to a non-NULL value, then updating it to handle the step-over-active-breakpoint case, and then later testing for non-NULL to see if it should reverse that step-over-active logic. It should have done like ARM7/ARM9 does: init to NULL. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/arm7tdmi.c')
-rw-r--r--src/target/arm7tdmi.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 16f16b0f..530a675b 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -598,7 +598,8 @@ static void arm7tdmi_branch_resume_thumb(struct target *target)
/* fetch NOP, LDM in EXECUTE stage (1st cycle) */
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
/* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
- arm7tdmi_clock_out(jtag_info, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) | 1, NULL, 0);
+ arm7tdmi_clock_out(jtag_info,
+ buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0);
/* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);