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author | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:48:04 -0800 |
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committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:48:04 -0800 |
commit | 249263d29da11b0ec981c2e0d520cd7dcf08939b (patch) | |
tree | e43b4204f3a8d5e2048c1552157a27063c845237 /src/target/arm_disassembler.c | |
parent | 1aac72d24339380f6e98c50dec4c96ab30537749 (diff) | |
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ADIv5 clean up AP selection and register caching
Handling of AP (and AP register bank) selection, and cached AP
registers, is pretty loose ... start tightening it:
- It's "AP bank" select support ... there are no DP banks. Rename.
+ dap_dp_bankselect() becomes dap_ap_bankselect()
+ "dp_select_value" struct field becomes "ap_bank_value"
- Remove duplicate AP cache init paths ... only use dap_ap_select(),
and don't make Cortex (A8 or M3) cores roll their own code.
- For dap_ap_bankselect(), pass up any fault code from writing
the SELECT register. (Nothing yet checks those codes.)
- Add various bits of Doxygen
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/arm_disassembler.c')
0 files changed, 0 insertions, 0 deletions