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| author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-23 22:42:03 +0000 |
|---|---|---|
| committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-23 22:42:03 +0000 |
| commit | 3813fda44adcea486b7308423a699f63d79273ee (patch) | |
| tree | f515b454cfaea4806d0d307c1d19f1e3081482d1 /src/target/arm_disassembler.c | |
| parent | aea6815462d3302f7f8b6576f59320d5f5985642 (diff) | |
| download | openocd+libswd-3813fda44adcea486b7308423a699f63d79273ee.tar.gz openocd+libswd-3813fda44adcea486b7308423a699f63d79273ee.tar.bz2 openocd+libswd-3813fda44adcea486b7308423a699f63d79273ee.tar.xz openocd+libswd-3813fda44adcea486b7308423a699f63d79273ee.zip | |
- Fixes '==' whitespace
- Replace ')\(==\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(==\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2371 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/arm_disassembler.c')
| -rw-r--r-- | src/target/arm_disassembler.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index b314e02a..e460e468 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -1158,7 +1158,7 @@ int evaluate_data_proc(uint32_t opcode, uint32_t address, arm_instruction_t *ins } else if ((op == 0xd) || (op == 0xf)) /* <opcode1>{<cond>}{S} <Rd>, <shifter_operand> */ { - if (opcode==0xe1a00000) /* print MOV r0,r0 as NOP */ + if (opcode == 0xe1a00000) /* print MOV r0,r0 as NOP */ snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tNOP",address, opcode); else snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\t%s%s%s r%i, %s", @@ -1327,7 +1327,7 @@ int evaluate_b_bl_blx_thumb(uint16_t opcode, uint32_t address, arm_instruction_t char *mnemonic = NULL; /* sign extend 11-bit offset */ - if (((opc==0) || (opc==2)) && (offset & 0x00000400)) + if (((opc == 0) || (opc == 2)) && (offset & 0x00000400)) offset = 0xfffff800 | offset; target_address = address + 4 + (offset << 1); @@ -1435,7 +1435,7 @@ int evaluate_shift_imm_thumb(uint16_t opcode, uint32_t address, arm_instruction_ break; } - if ((imm==0) && (opc != 0)) + if ((imm == 0) && (opc != 0)) imm = 32; instruction->info.data_proc.Rd = Rd; @@ -1748,7 +1748,7 @@ int evaluate_load_store_imm_thumb(uint16_t opcode, uint32_t address, arm_instruc mnemonic = "STR"; } - if ((opcode&0xF000)==0x8000) + if ((opcode&0xF000) == 0x8000) { suffix = 'H'; shift = 1; |