diff options
| author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-23 22:47:42 +0000 |
|---|---|---|
| committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-23 22:47:42 +0000 |
| commit | dc575dc5bf8cb597a0e9a47794744ae6b1928087 (patch) | |
| tree | 325ee3b79fe5801fd11a9cfa5e848ea15a52d5eb /src/target/arm_disassembler.c | |
| parent | f90d8fa45f2d4c9d4b7990f198b232ee55cbb4e1 (diff) | |
| download | openocd+libswd-dc575dc5bf8cb597a0e9a47794744ae6b1928087.tar.gz openocd+libswd-dc575dc5bf8cb597a0e9a47794744ae6b1928087.tar.bz2 openocd+libswd-dc575dc5bf8cb597a0e9a47794744ae6b1928087.tar.xz openocd+libswd-dc575dc5bf8cb597a0e9a47794744ae6b1928087.zip | |
Remove whitespace that occurs before ')'.
- Replace '[ \t]*[)]' with ')'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2377 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/arm_disassembler.c')
| -rw-r--r-- | src/target/arm_disassembler.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index d290b670..9ba28657 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -762,7 +762,7 @@ int evaluate_mrs_msr(uint32_t opcode, uint32_t address, arm_instruction_t *instr (opcode & 0x40000) ? "s" : "", (opcode & 0x80000) ? "f" : "", ror(immediate, (rotate * 2)) - ); +); } else /* register variant */ { @@ -774,7 +774,7 @@ int evaluate_mrs_msr(uint32_t opcode, uint32_t address, arm_instruction_t *instr (opcode & 0x40000) ? "s" : "", (opcode & 0x80000) ? "f" : "", Rm - ); +); } } @@ -1200,7 +1200,7 @@ int arm_evaluate_opcode(uint32_t opcode, uint32_t address, arm_instruction_t *in if ((opcode & 0x0e000000) == 0x0a000000) return evaluate_blx_imm(opcode, address, instruction); - /* Extended coprocessor opcode space (ARMv5 and higher )*/ + /* Extended coprocessor opcode space (ARMv5 and higher)*/ /* Coprocessor load/store and double register transfers */ if ((opcode & 0x0e000000) == 0x0c000000) return evaluate_ldc_stc_mcrr_mrrc(opcode, address, instruction); |