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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-05 22:04:22 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-05 22:04:22 -0800 |
| commit | 03ac53a2cfdb7d0715f7060cecf8719068f6fae1 (patch) | |
| tree | 20fa43151ab7693af4c61cc5e102ccb781bf3307 /src/target/arm_simulator.c | |
| parent | a81df55f393478cdef9197c248a1b64d26465589 (diff) | |
| download | openocd+libswd-03ac53a2cfdb7d0715f7060cecf8719068f6fae1.tar.gz openocd+libswd-03ac53a2cfdb7d0715f7060cecf8719068f6fae1.tar.bz2 openocd+libswd-03ac53a2cfdb7d0715f7060cecf8719068f6fae1.tar.xz openocd+libswd-03ac53a2cfdb7d0715f7060cecf8719068f6fae1.zip | |
ARM: other code uses the new inheritance/nesting scheme
Remove most remaining uses of target->arch_info from ARM
infrastructure, where it hasn't already been updated.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/arm_simulator.c')
| -rw-r--r-- | src/target/arm_simulator.c | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c index 27957b2f..2d35af98 100644 --- a/src/target/arm_simulator.c +++ b/src/target/arm_simulator.c @@ -825,21 +825,19 @@ static enum armv4_5_mode armv4_5_get_mode(struct arm_sim_interface *sim) int arm_simulate_step(target_t *target, uint32_t *dry_run_pc) { - armv4_5_common_t *armv4_5 = target->arch_info; - + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); struct arm_sim_interface sim; - sim.user_data=armv4_5; - sim.get_reg=&armv4_5_get_reg; - sim.set_reg=&armv4_5_set_reg; - sim.get_reg_mode=&armv4_5_get_reg_mode; - sim.set_reg_mode=&armv4_5_set_reg_mode; - sim.get_cpsr=&armv4_5_get_cpsr; - sim.get_mode=&armv4_5_get_mode; - sim.get_state=&armv4_5_get_state; - sim.set_state=&armv4_5_set_state; + sim.user_data = armv4_5; + sim.get_reg = &armv4_5_get_reg; + sim.set_reg = &armv4_5_set_reg; + sim.get_reg_mode = &armv4_5_get_reg_mode; + sim.set_reg_mode = &armv4_5_set_reg_mode; + sim.get_cpsr = &armv4_5_get_cpsr; + sim.get_mode = &armv4_5_get_mode; + sim.get_state = &armv4_5_get_state; + sim.set_state = &armv4_5_set_state; return arm_simulate_step_core(target, dry_run_pc, &sim); - } |