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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-07 14:54:13 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-07 14:57:44 -0800 |
| commit | 0529c14bfeb113ee37f4d961f9309102d57a1e39 (patch) | |
| tree | 1427fc3341776036336f005d28572907a2699f74 /src/target/armv4_5.c | |
| parent | a4a2808c2a849eddd5d7d454c048ffdfd89ca9c6 (diff) | |
| download | openocd+libswd-0529c14bfeb113ee37f4d961f9309102d57a1e39.tar.gz openocd+libswd-0529c14bfeb113ee37f4d961f9309102d57a1e39.tar.bz2 openocd+libswd-0529c14bfeb113ee37f4d961f9309102d57a1e39.tar.xz openocd+libswd-0529c14bfeb113ee37f4d961f9309102d57a1e39.zip | |
ARM: rename some generic routines
Rename some (mostly) generic ARM functions:
armv4_5_arch_state() --> arm_arch_state()
armv4_5_get_gdb_reg_list() --> arm_get_gdb_reg_list()
armv4_5_init_arch_info() --> arm_init_arch_info()
Cores using the microcontroller profile may want a different
arch_state() routine though.
(Also fix strange indentation in arm_arch_state: use tabs only!
And update a call to it, removing assignment-in-conditional.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/armv4_5.c')
| -rw-r--r-- | src/target/armv4_5.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index ad89b2f8..7fec97b5 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -581,7 +581,7 @@ struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm) return cache; } -int armv4_5_arch_state(struct target *target) +int arm_arch_state(struct target *target) { struct arm *armv4_5 = target_to_arm(target); @@ -593,11 +593,11 @@ int armv4_5_arch_state(struct target *target) LOG_USER("target halted in %s state due to %s, current mode: %s\n" "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "%s", - arm_state_strings[armv4_5->core_state], - Jim_Nvp_value2name_simple(nvp_target_debug_reason, + arm_state_strings[armv4_5->core_state], + Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name, - arm_mode_name(armv4_5->core_mode), - buf_get_u32(armv4_5->cpsr->value, 0, 32), + arm_mode_name(armv4_5->core_mode), + buf_get_u32(armv4_5->cpsr->value, 0, 32), buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32), armv4_5->is_semihosting ? ", semihosting" : ""); @@ -972,7 +972,8 @@ const struct command_registration arm_command_handlers[] = { COMMAND_REGISTRATION_DONE }; -int armv4_5_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size) +int arm_get_gdb_reg_list(struct target *target, + struct reg **reg_list[], int *reg_list_size) { struct arm *armv4_5 = target_to_arm(target); int i; @@ -1419,7 +1420,7 @@ static int arm_default_mcr(struct target *target, int cpnum, return ERROR_FAIL; } -int armv4_5_init_arch_info(struct target *target, struct arm *armv4_5) +int arm_init_arch_info(struct target *target, struct arm *armv4_5) { target->arch_info = armv4_5; armv4_5->target = target; |