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| author | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2007-03-28 16:31:55 +0000 |
|---|---|---|
| committer | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2007-03-28 16:31:55 +0000 |
| commit | 4a5f45e87d593d6911da680cb92ffbc9b43c9486 (patch) | |
| tree | d41ddb8594b5fab03c12075cbc4d3888d59ed027 /src/target/armv4_5.h | |
| parent | 5ed126c4f90948fbf53d186dc4ef49018fb5ecfc (diff) | |
| download | openocd+libswd-4a5f45e87d593d6911da680cb92ffbc9b43c9486.tar.gz openocd+libswd-4a5f45e87d593d6911da680cb92ffbc9b43c9486.tar.bz2 openocd+libswd-4a5f45e87d593d6911da680cb92ffbc9b43c9486.tar.xz openocd+libswd-4a5f45e87d593d6911da680cb92ffbc9b43c9486.zip | |
- merged XScale branch back into trunk
- fixed some compiler warnigns in amt_jtagaccel.c, bitbang.c, parport.c
- free working area and register stuff if str7x block write algorithm failed
- check PC after exiting a target algorithm in armv4_5.c
git-svn-id: svn://svn.berlios.de/openocd/trunk@135 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/armv4_5.h')
| -rw-r--r-- | src/target/armv4_5.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h index 47996de4..0ba94ff7 100644 --- a/src/target/armv4_5.h +++ b/src/target/armv4_5.h @@ -213,6 +213,11 @@ extern int armv4_5_invalidate_core_regs(target_t *target); */ #define ARMV4_5_MCR(CP, op1, Rd, CRn, CRm, op2) (0xee000010 | (CRm) | ((op2) << 5) | ((CP) << 8) | ((Rd) << 12) | ((CRn) << 16) | ((op1) << 21)) +/* Breakpoint instruction (ARMv5) + * Im: 16-bit immediate + */ +#define ARMV5_BKPT(Im) (0xe1200070 | ((Im & 0xfff0) << 8) | (Im & 0xf)) + /* Thumb mode instructions */ @@ -266,4 +271,9 @@ extern int armv4_5_invalidate_core_regs(target_t *target); */ #define ARMV4_5_T_B(Imm) ((0xe000 | (Imm)) | ((0xe000 | (Imm)) << 16)) +/* Breakpoint instruction (ARMv5) (Thumb state) + * Im: 8-bit immediate + */ +#define ARMV5_T_BKPT(Im) ((0xbe00 | Im) | ((0xbe00 | Im) << 16)) + #endif /* ARMV4_5_H */ |