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authorDavid Brownell <dbrownell@users.sourceforge.net>2009-12-03 16:08:04 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-12-03 16:08:04 -0800
commiteb6c880ddcb06cb011ebd4557d9057d04ab9b4fb (patch)
treef53fd2d9108872af5b5166fb9e211c3ef53a5e25 /src/target/armv7a.h
parentadbf40a04537acba3cf5fea7b71dab6ac3249646 (diff)
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ARM DPM: make DSCR bit defs sharable
Move the symbols for these bits from "armv7a.h" to "arm_dpm.h", where they can be seen and used not just by Cortex-A but also by the ARM11 (armv6) code. Change them from bit numbers to bit masks ... this matches the usage in ARM11 code, and also makes it easier to read. Rename DSCR_EXT_INT_EN as DSCR_ITR_EN to match the docs; it's enabling ITR functionality, not external interrupts, so this changes the name to be less misleading. (There *IS* a bit affecting interrupts, and this isn't it.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/armv7a.h')
-rw-r--r--src/target/armv7a.h10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/target/armv7a.h b/src/target/armv7a.h
index 0d5da86f..f089c5c5 100644
--- a/src/target/armv7a.h
+++ b/src/target/armv7a.h
@@ -114,16 +114,6 @@ target_to_armv7a(struct target *target)
/* See ARMv7a arch spec section C10.8 */
#define CPUDBG_AUTHSTATUS 0xFB8
-/* DSCR bit numbers (See ARMv7a arch spec section 12.4.5) */
-#define DSCR_CORE_HALTED 0
-#define DSCR_CORE_RESTARTED 1
-#define DSCR_EXT_INT_EN 13
-#define DSCR_HALT_DBG_MODE 14
-#define DSCR_MON_DBG_MODE 15
-#define DSCR_INSTR_COMP 24
-#define DSCR_DTR_TX_FULL 29
-#define DSCR_DTR_RX_FULL 30
-
struct armv7a_algorithm
{
int common_magic;