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| author | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-11 18:39:43 +0000 |
|---|---|---|
| committer | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-11 18:39:43 +0000 |
| commit | 0fe2a5435a78ac32eddc2398cc95759c2211ea04 (patch) | |
| tree | 35a0229949bec8e085b0d097c289eb12e57820f5 /src/target/armv7m.c | |
| parent | 09e303bb8e51f0ab123c70f954039fbef8ca9a91 (diff) | |
| download | openocd+libswd-0fe2a5435a78ac32eddc2398cc95759c2211ea04.tar.gz openocd+libswd-0fe2a5435a78ac32eddc2398cc95759c2211ea04.tar.bz2 openocd+libswd-0fe2a5435a78ac32eddc2398cc95759c2211ea04.tar.xz openocd+libswd-0fe2a5435a78ac32eddc2398cc95759c2211ea04.zip | |
- 16 and 32 bit unaligned accesses supported
- uses packed transfers for 8/16bit read/writes greater than 4bytes
- 8/16bit transfers now use address auto increment
git-svn-id: svn://svn.berlios.de/openocd/trunk@495 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/armv7m.c')
| -rw-r--r-- | src/target/armv7m.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c index f1f0ac96..99d289ad 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -111,10 +111,10 @@ armv7m_core_reg_t armv7m_core_reg_list_arch_info[] = /* CORE_SP are accesible using MSR and MRS instructions */ #if 0 -// {0x00, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* APSR */ -// {0x01, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* IAPSR */ -// {0x05, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* IPSR */ -// {0x06, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* EPSR */ + {0x00, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* APSR */ + {0x01, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* IAPSR */ + {0x05, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* IPSR */ + {0x06, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* EPSR */ #endif {0x10, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* PRIMASK */ |