summaryrefslogtreecommitdiff
path: root/src/target/armv7m.c
diff options
context:
space:
mode:
authorDavid Brownell <dbrownell@users.sourceforge.net>2010-02-21 14:34:33 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2010-02-21 14:34:33 -0800
commit1aac72d24339380f6e98c50dec4c96ab30537749 (patch)
treeefd8b83082f072d807f168eabf415e1002cf5425 /src/target/armv7m.c
parenta299371a9ec109da3851cb43aed3e9157d095358 (diff)
downloadopenocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.tar.gz
openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.tar.bz2
openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.tar.xz
openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.zip
ARM: keep a handle to the PC
Keep a handle to the PC in "struct arm", and use it. This register is used a fair amount, so this is a net minor code shrink (other than some line length fixes), but mostly it's to make things more readable. For XScale, fix a dodgy sequence while stepping. It was initializing a variable to a non-NULL value, then updating it to handle the step-over-active-breakpoint case, and then later testing for non-NULL to see if it should reverse that step-over-active logic. It should have done like ARM7/ARM9 does: init to NULL. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/armv7m.c')
-rw-r--r--src/target/armv7m.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index faa886b4..466c0b2a 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -282,7 +282,7 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int
/* ARMV7M is always in thumb mode, try to make GDB understand this
* if it does not support this arch */
- *((char*)armv7m->core_cache->reg_list[15].value) |= 1;
+ *((char*)armv7m->arm.pc->value) |= 1;
#else
(*reg_list)[25] = &armv7m->core_cache->reg_list[ARMV7M_xPSR];
#endif
@@ -485,7 +485,7 @@ int armv7m_arch_state(struct target *target)
armv7m_mode_strings[armv7m->core_mode],
armv7m_exception_string(armv7m->exception_number),
buf_get_u32(arm->cpsr->value, 0, 32),
- buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_PC].value, 0, 32),
+ buf_get_u32(arm->pc->value, 0, 32),
(ctrl & 0x02) ? 'p' : 'm',
sp);
@@ -535,6 +535,7 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target)
}
arm->cpsr = reg_list + ARMV7M_xPSR;
+ arm->pc = reg_list + ARMV7M_PC;
arm->core_cache = cache;
return cache;
}
@@ -708,7 +709,7 @@ int armv7m_blank_check_memory(struct target *target,
int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
- struct reg *r = armv7m->core_cache->reg_list + 15;
+ struct reg *r = armv7m->arm.pc;
bool result = false;