- add missing svn props from svn 1798 commit

git-svn-id: svn://svn.berlios.de/openocd/trunk@1808 b42882b7-edfa-0310-969c-e2dbd0fdcd60

1 files changed, 46 insertions, 46 deletions

diff --git a/src/target/board/crossbow_tech_imote2.cfg b/src/target/board/crossbow_tech_imote2.cfg
index 8cdd7001..7527bef8 100644
--- a/src/target/board/crossbow_tech_imote2.cfg
+++ b/src/target/board/crossbow_tech_imote2.cfg
@@ -1,46 +1,46 @@
-# Crossbow Technology iMote2

-

-if { [info exists CHIPNAME] } {	

-   set  _CHIPNAME $CHIPNAME    

-} else {	 

-   set  _CHIPNAME imote2

-}

-

-if { [info exists ENDIAN] } {	

-   set  _ENDIAN $ENDIAN    

-} else {	 

-   set  _ENDIAN little

-}

-

-if { [info exists CPUTAPID ] } {

-   set _CPUTAPID $CPUTAPID

-} else {

-  # force an error till we get a good number

-   set _CPUTAPID 0xffffffff

-}

-

-# PXA271 and an Intel Strataflash of 32 Megabytes (p30)

-# 

-# Marvell/Intel PXA270 Script

-# set jtag_nsrst_delay to the delay introduced by your reset circuit

-# the rest of the needed delays are built into the openocd program

-jtag_nsrst_delay 800 

-# set the jtag_ntrst_delay to the delay introduced by a reset circuit

-# the rest of the needed delays are built into the openocd program

-jtag_ntrst_delay 0

-#use combined on interfaces or targets that can't set TRST/SRST separately

-reset_config trst_and_srst separate

-#jtag scan chain

-

-jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID

-

-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x

-$_TARGETNAME configure -work-area-virt 0x0x5c000000 -work-area-phys 0x0x5c000000 -work-area-size 0x10000 -work-area-backup 1

-# maps to PXA internal RAM. If you are using a PXA255

-# you must initialize SDRAM or leave this option off

-

-

-#flash bank <driver> <base> <size> <chip_width> <bus_width>

-# works for P30 flash

-flash bank cfi 0x00000000 0x2000000 2 2 0

+# Crossbow Technology iMote2
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME imote2
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # force an error till we get a good number
+   set _CPUTAPID 0xffffffff
+}
+
+# PXA271 and an Intel Strataflash of 32 Megabytes (p30)
+# 
+# Marvell/Intel PXA270 Script
+# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_nsrst_delay 800 
+# set the jtag_ntrst_delay to the delay introduced by a reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_ntrst_delay 0
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst separate
+#jtag scan chain
+
+jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x
+$_TARGETNAME configure -work-area-virt 0x0x5c000000 -work-area-phys 0x0x5c000000 -work-area-size 0x10000 -work-area-backup 1
+# maps to PXA internal RAM. If you are using a PXA255
+# you must initialize SDRAM or leave this option off
+
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+# works for P30 flash
+flash bank cfi 0x00000000 0x2000000 2 2 0