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authorzwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2009-05-14 21:55:56 +0000
committerzwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2009-05-14 21:55:56 +0000
commitca7ec066b23419dd8139174b24d6f3a8863acecc (patch)
treec52eabfb020b466e0a44453e5d20794eb7b78c1d /src/target/board
parentadf3a2ce7ba7cc96d1202a3d8bb086fd78d697ad (diff)
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Paul Thomas <pthomas8589@gmail.com>: new board cfg for Linuxstamp-mx27
git-svn-id: svn://svn.berlios.de/openocd/trunk@1788 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/board')
-rw-r--r--src/target/board/imx27lnst.cfg59
1 files changed, 59 insertions, 0 deletions
diff --git a/src/target/board/imx27lnst.cfg b/src/target/board/imx27lnst.cfg
new file mode 100644
index 00000000..2ee7f094
--- /dev/null
+++ b/src/target/board/imx27lnst.cfg
@@ -0,0 +1,59 @@
+# The Linuxstamp-mx27 is board has a single IMX27 chip
+# For further info see http://opencircuits.com/Linuxstamp_mx27#OpenOCD
+source [find target/imx27.cfg]
+$_TARGETNAME configure -event gdb-attach { reset init }
+$_TARGETNAME configure -event reset-init { imx27lnst_init }
+
+proc imx27lnst_init { } {
+ # This setup puts RAM at 0xA0000000
+
+ # reset the board correctly
+ jtag_khz 500
+ reset run
+ reset halt
+
+ mww 0x10000000 0x20040304
+ mww 0x10020000 0x00000000
+ mww 0x10000004 0xDFFBFCFB
+ mww 0x10020004 0xFFFFFFFF
+
+ sleep 100
+
+ # ========================================
+ # Configure DDR on CSD0 -- initial reset
+ # ========================================
+ mww 0xD8001010 0x00000008
+
+ sleep 100
+
+ # ========================================
+ # Configure DDR on CSD0 -- wait 5000 cycle
+ # ========================================
+ mww 0x10027828 0x55555555
+ mww 0x10027830 0x55555555
+ mww 0x10027834 0x55555555
+ mww 0x10027838 0x00005005
+ mww 0x1002783C 0x15555555
+
+ mww 0xD8001010 0x00000004
+
+ mww 0xD8001004 0x00795729
+
+ #mww 0xD8001000 0x92200000
+ mww 0xD8001000 0x91120000
+ mww 0xA0000F00 0x0
+
+ #mww 0xD8001000 0xA2200000
+ mww 0xD8001000 0xA1120000
+ mww 0xA0000F00 0x0
+ mww 0xA0000F00 0x0
+
+ #mww 0xD8001000 0xB2200000
+ mww 0xD8001000 0xB1120000
+ mwb 0xA0000033 0xFF
+ mwb 0xA1000000 0xAA
+
+ #mww 0xD8001000 0x82228085
+ mww 0xD8001000 0x81128080
+
+}