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authorØyvind Harboe <oyvind.harboe@zylin.com>2011-03-22 11:29:10 +0100
committerØyvind Harboe <oyvind.harboe@zylin.com>2011-03-22 11:29:10 +0100
commitdec80e1cffa162ba0e1cd8e6ee66c7784fe79b87 (patch)
tree253caf44fca37ddf905cfe1224830a6a8ec2fed1 /src/target/cortex_a.h
parenta843789ede3b01dfaf199e1fcfbfd09ac681cf8f (diff)
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cortex_a: rename cortex_a8.c/h to cortex_a.c/h
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Diffstat (limited to 'src/target/cortex_a.h')
-rw-r--r--src/target/cortex_a.h89
1 files changed, 89 insertions, 0 deletions
diff --git a/src/target/cortex_a.h b/src/target/cortex_a.h
new file mode 100644
index 00000000..b49e670f
--- /dev/null
+++ b/src/target/cortex_a.h
@@ -0,0 +1,89 @@
+/***************************************************************************
+ * Copyright (C) 2005 by Dominic Rath *
+ * Dominic.Rath@gmx.de *
+ * *
+ * Copyright (C) 2006 by Magnus Lundin *
+ * lundin@mlu.mine.nu *
+ * *
+ * Copyright (C) 2008 by Spencer Oliver *
+ * spen@spen-soft.co.uk *
+ * *
+ * Copyright (C) 2009 by Dirk Behme *
+ * dirk.behme@gmail.com - copy from cortex_m3 *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, write to the *
+ * Free Software Foundation, Inc., *
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ ***************************************************************************/
+#ifndef CORTEX_A8_H
+#define CORTEX_A8_H
+
+#include "armv7a.h"
+
+#define CORTEX_A8_COMMON_MAGIC 0x411fc082
+
+#define CPUDBG_CPUID 0xD00
+#define CPUDBG_CTYPR 0xD04
+#define CPUDBG_TTYPR 0xD0C
+#define CPUDBG_LOCKACCESS 0xFB0
+#define CPUDBG_LOCKSTATUS 0xFB4
+
+#define BRP_NORMAL 0
+#define BRP_CONTEXT 1
+
+#define CORTEX_A8_PADDRDBG_CPU_SHIFT 13
+
+struct cortex_a8_brp
+{
+ int used;
+ int type;
+ uint32_t value;
+ uint32_t control;
+ uint8_t BRPn;
+};
+
+struct cortex_a8_common
+{
+ int common_magic;
+ struct arm_jtag jtag_info;
+
+ /* Context information */
+ uint32_t cpudbg_dscr;
+
+ /* Saved cp15 registers */
+ uint32_t cp15_control_reg;
+
+ /* Breakpoint register pairs */
+ int brp_num_context;
+ int brp_num;
+ int brp_num_available;
+ struct cortex_a8_brp *brp_list;
+
+ /* Use cortex_a8_read_regs_through_mem for fast register reads */
+ int fast_reg_read;
+
+ /* Flag that helps to resolve what ttb to use: user or kernel */
+ int current_address_mode;
+
+ struct armv7a_common armv7a_common;
+};
+
+static inline struct cortex_a8_common *
+target_to_cortex_a8(struct target *target)
+{
+ return container_of(target->arch_info, struct cortex_a8_common,
+ armv7a_common.armv4_5_common);
+}
+
+#endif /* CORTEX_A8_H */