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| author | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:34:33 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:34:33 -0800 |
| commit | 1aac72d24339380f6e98c50dec4c96ab30537749 (patch) | |
| tree | efd8b83082f072d807f168eabf415e1002cf5425 /src/target/cortex_m3.c | |
| parent | a299371a9ec109da3851cb43aed3e9157d095358 (diff) | |
| download | openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.tar.gz openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.tar.bz2 openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.tar.xz openocd+libswd-1aac72d24339380f6e98c50dec4c96ab30537749.zip | |
ARM: keep a handle to the PC
Keep a handle to the PC in "struct arm", and use it.
This register is used a fair amount, so this is a net
minor code shrink (other than some line length fixes),
but mostly it's to make things more readable.
For XScale, fix a dodgy sequence while stepping. It
was initializing a variable to a non-NULL value, then
updating it to handle the step-over-active-breakpoint
case, and then later testing for non-NULL to see if
it should reverse that step-over-active logic. It
should have done like ARM7/ARM9 does: init to NULL.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/cortex_m3.c')
| -rw-r--r-- | src/target/cortex_m3.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index fbc879f1..a3b3d425 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -427,7 +427,7 @@ static int cortex_m3_debug_entry(struct target *target) LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s", armv7m_mode_strings[armv7m->core_mode], - *(uint32_t*)(armv7m->core_cache->reg_list[15].value), + *(uint32_t*)(arm->pc->value), target_state_name(target)); if (armv7m->post_debug_entry) @@ -680,7 +680,7 @@ static int cortex_m3_resume(struct target *target, int current, } /* current = 1: continue on current pc, otherwise continue at <address> */ - r = armv7m->core_cache->reg_list + 15; + r = armv7m->arm.pc; if (!current) { buf_set_u32(r->value, 0, 32, address); @@ -749,7 +749,7 @@ static int cortex_m3_step(struct target *target, int current, struct armv7m_common *armv7m = &cortex_m3->armv7m; struct swjdp_common *swjdp = &armv7m->swjdp_info; struct breakpoint *breakpoint = NULL; - struct reg *pc = armv7m->core_cache->reg_list + 15; + struct reg *pc = armv7m->arm.pc; bool bkpt_inst_found = false; if (target->state != TARGET_HALTED) |