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| author | Øyvind Harboe <oyvind.harboe@zylin.com> | 2009-10-27 14:02:16 +0100 |
|---|---|---|
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2009-11-05 09:53:31 +0100 |
| commit | d269122f91efaf2f745424c215fabb758b7e7ea0 (patch) | |
| tree | 7e692e954a34ca07243ff9d9fc06db186f8c9fd1 /src/target/cortex_m3.c | |
| parent | 972924b2ad4bb7da34e331d4854b5f3d3e9e7260 (diff) | |
| download | openocd+libswd-d269122f91efaf2f745424c215fabb758b7e7ea0.tar.gz openocd+libswd-d269122f91efaf2f745424c215fabb758b7e7ea0.tar.bz2 openocd+libswd-d269122f91efaf2f745424c215fabb758b7e7ea0.tar.xz openocd+libswd-d269122f91efaf2f745424c215fabb758b7e7ea0.zip | |
target: add target->type->has_mmu fn.
improve default target->read/write_phys_memory, produce
more sensible error messages if the mmu interface
functions have not been implemented yet vs. will
not be implemented(e.g. cortex m3).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Diffstat (limited to 'src/target/cortex_m3.c')
| -rw-r--r-- | src/target/cortex_m3.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index ff977920..1afa29ff 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -52,6 +52,12 @@ extern uint8_t armv7m_gdb_dummy_cpsr_value[]; extern reg_t armv7m_gdb_dummy_cpsr_reg; #endif +static int cortex_m3_has_mmu(struct target_s *target, bool *has_mmu) +{ + *has_mmu = false; + return ERROR_OK; +} + static int cortexm3_dap_read_coreregister_u32(swjdp_common_t *swjdp, uint32_t *value, int regnum) { @@ -1837,6 +1843,7 @@ target_type_t cortexm3_target = .register_commands = cortex_m3_register_commands, .target_create = cortex_m3_target_create, .init_target = cortex_m3_init_target, + .has_mmu = cortex_m3_has_mmu, .examine = cortex_m3_examine, }; |