summaryrefslogtreecommitdiff
path: root/src/target/cortex_m3.h
diff options
context:
space:
mode:
authorDavid Brownell <dbrownell@users.sourceforge.net>2009-11-05 01:03:54 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-11-05 01:03:54 -0800
commit8fb2baaa6b428bd50165f045749786c34857ab02 (patch)
tree2ece78c238da0ac617b443303a45e0711a1a9060 /src/target/cortex_m3.h
parent7acb2607ff79336174014ddfc313433ada9abc44 (diff)
downloadopenocd+libswd-8fb2baaa6b428bd50165f045749786c34857ab02.tar.gz
openocd+libswd-8fb2baaa6b428bd50165f045749786c34857ab02.tar.bz2
openocd+libswd-8fb2baaa6b428bd50165f045749786c34857ab02.tar.xz
openocd+libswd-8fb2baaa6b428bd50165f045749786c34857ab02.zip
Cortex-M3: minor cleanup
There's no reason to read which interrupts are enabled from the NVIC; that state isn't used. Plus, it's highly dynamic since firmware can change it at any time; remove the support for those state records. Remove duplicate definition of DWT_CTRL address; shrink a line. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/cortex_m3.h')
-rw-r--r--src/target/cortex_m3.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h
index f4cefa78..a7074d36 100644
--- a/src/target/cortex_m3.h
+++ b/src/target/cortex_m3.h
@@ -60,8 +60,6 @@
#define FP_COMP6 0xE0002020
#define FP_COMP7 0xE0002024
-#define DWT_CTRL 0xE0001000
-
/* DCB_DHCSR bit and field definitions */
#define DBGKEY (0xA05F << 16)
#define C_DEBUGEN (1 << 0)
@@ -160,10 +158,6 @@ typedef struct cortex_m3_common_s
int dwt_comp_available;
cortex_m3_dwt_comparator_t *dwt_comparator_list;
- /* Interrupts */
- int intlinesnum;
- uint32_t *intsetenable;
-
armv7m_common_t armv7m;
void *arch_info;
} cortex_m3_common_t;