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| author | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-21 20:03:17 +0000 |
|---|---|---|
| committer | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-21 20:03:17 +0000 |
| commit | cd0ca916b342215e5bde80586051cb105fedad56 (patch) | |
| tree | 4218f89bcf25c3ecac803cba1a971228f60f2d3e /src/target/cortex_m3.h | |
| parent | 55b1ea1d8e4558e68a58f33a9900163605f8333f (diff) | |
| download | openocd+libswd-cd0ca916b342215e5bde80586051cb105fedad56.tar.gz openocd+libswd-cd0ca916b342215e5bde80586051cb105fedad56.tar.bz2 openocd+libswd-cd0ca916b342215e5bde80586051cb105fedad56.tar.xz openocd+libswd-cd0ca916b342215e5bde80586051cb105fedad56.zip | |
David Brownell <david-b@pacbell.net>:
Revert parts of the previous ARMv7-M register patch.
It turns out that part of the issue is a documentation
problem for the Cortex-M3 r1 parts. So for the rest,
simpler fixes are possible (in followup patch).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2552 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/cortex_m3.h')
| -rw-r--r-- | src/target/cortex_m3.h | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h index ba61b1cb..e6714d00 100644 --- a/src/target/cortex_m3.h +++ b/src/target/cortex_m3.h @@ -117,21 +117,6 @@ extern char* cortex_m3_state_strings[]; #define FPCR_REPLACE_BKPT_HIGH (2 << 30) #define FPCR_REPLACE_BKPT_BOTH (3 << 30) -/* Use MRS/MSR to read/write any of these special registers. Some of - * them (xPSR, MSP, PSP) are always available using DCRxR. Starting in - * Cortex-M3 r2p0, some (CONTROL, BASEPRI, and *MASK) are also available - * through DCRxR. - * NOTE: this listing omits xPSR components and other mixtures. - */ -#define SR_XPSR 3 -#define SR_MSP 8 -#define SR_PSP 9 -#define SR_PRIMASK 16 -#define SR_BASEPRI 17 -#define SR_BASEPRI_MAX 18 -#define SR_FAULTMASK 19 -#define SR_CONTROL 20 - typedef struct cortex_m3_fp_comparator_s { int used; |