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authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-03-05 19:21:22 +0000
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-03-05 19:21:22 +0000
commit9b25f5eba2a8326e28146bbe315efe21e0cea91e (patch)
tree6ad93bcd11eac1032c2f232eb9ab2fe770644844 /src/target/embeddedice.h
parentf14f84ca1e5d4fbab00c52100859af5ec8226753 (diff)
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added jtag_add_dr_out(). Better for hw fifo, same for software fifo.
Passes 94kBytes/s regression test. Works with str912, which relies on bypass git-svn-id: svn://svn.berlios.de/openocd/trunk@447 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/embeddedice.h')
-rw-r--r--src/target/embeddedice.h63
1 files changed, 59 insertions, 4 deletions
diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 62c5b78b..dde37f65 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -104,13 +104,68 @@ extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
* embeddedice_write_reg
*/
-static __inline void embeddedice_write_reg_inner(reg_t *reg, u32 value)
+static __inline__ void embeddedice_write_reg_inner(reg_t *reg, u32 value)
{
embeddedice_reg_t *ice_reg = reg->arch_info;
u8 reg_addr = ice_reg->addr & 0x1f;
- jtag_add_shift(TAP_SD, TAP_PD, 32, value);
- jtag_add_shift(TAP_SD, TAP_PD, 5, reg_addr);
- jtag_add_shift(TAP_SD, TAP_RTI, 1, 1);
+#if 1
+ u32 values[3];
+ int num_bits[3];
+
+ values[0]=value;
+ num_bits[0]=32;
+ values[1]=reg_addr;
+ num_bits[1]=5;
+ values[2]=1;
+ num_bits[2]=1;
+
+ jtag_add_dr_out(ice_reg->jtag_info->chain_pos,
+ 3,
+ num_bits,
+ values,
+ -1);
+#else
+ scan_field_t fields[3];
+ u8 field0_out[4];
+ u8 field1_out[1];
+ u8 field2_out[1];
+
+ fields[0].device = ice_reg->jtag_info->chain_pos;
+ fields[0].num_bits = 32;
+ fields[0].out_value = field0_out;
+ buf_set_u32(fields[0].out_value, 0, 32, value);
+ fields[0].out_mask = NULL;
+ fields[0].in_value = NULL;
+ fields[0].in_check_value = NULL;
+ fields[0].in_check_mask = NULL;
+ fields[0].in_handler = NULL;
+ fields[0].in_handler_priv = NULL;
+
+ fields[1].device = ice_reg->jtag_info->chain_pos;
+ fields[1].num_bits = 5;
+ fields[1].out_value = field1_out;
+ buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
+ fields[1].out_mask = NULL;
+ fields[1].in_value = NULL;
+ fields[1].in_check_value = NULL;
+ fields[1].in_check_mask = NULL;
+ fields[1].in_handler = NULL;
+ fields[1].in_handler_priv = NULL;
+
+ fields[2].device = ice_reg->jtag_info->chain_pos;
+ fields[2].num_bits = 1;
+ fields[2].out_value = field2_out;
+ buf_set_u32(fields[2].out_value, 0, 1, 1);
+ fields[2].out_mask = NULL;
+ fields[2].in_value = NULL;
+ fields[2].in_check_value = NULL;
+ fields[2].in_check_mask = NULL;
+ fields[2].in_handler = NULL;
+ fields[2].in_handler_priv = NULL;
+
+ jtag_add_dr_scan(3, fields, -1);
+
+#endif
}