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| author | dbrownell <dbrownell@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-23 21:52:40 +0000 |
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| committer | dbrownell <dbrownell@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-23 21:52:40 +0000 |
| commit | 22045fa6f28813f9e7b17c052f4c7a6c8355178d (patch) | |
| tree | 4c02321d98f6b7ecba3b4ed7416f08be914ff289 /src/target/mips32.c | |
| parent | d9ce8a2f60ece3b98a6d99b0e5aff8d4adef29fa (diff) | |
| download | openocd+libswd-22045fa6f28813f9e7b17c052f4c7a6c8355178d.tar.gz openocd+libswd-22045fa6f28813f9e7b17c052f4c7a6c8355178d.tar.bz2 openocd+libswd-22045fa6f28813f9e7b17c052f4c7a6c8355178d.tar.xz openocd+libswd-22045fa6f28813f9e7b17c052f4c7a6c8355178d.zip | |
When setting up an ETM, cache its ETM_CONFIG register. Then
only expose the registers which are actually present. They
could be missing for two basic reasons:
- This version might not support them at all; e.g. ETMv1.1
doesn't have some control/status registers. (My sample of
ARM9 boards shows all with ETMv1.3 support, FWIW.)
- The configuration on this chip may not populate as many
registers as possible; e.g. only two data value comparators
instead of eight.
Includes a bugfix in the "etm info" command: only one of the
two registers is missing on older silicon, so show the first
one before bailing.
Update ETM usage docs to explain that those registers need to be
written to configure what is traced, and that some ETM configs
are not yet handled. Also, give some examples of the kinds of
constrained trace which could be arranged.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/mips32.c')
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