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authorSpencer Oliver <ntfreak@users.sourceforge.net>2010-03-16 12:54:08 +0000
committerSpencer Oliver <ntfreak@users.sourceforge.net>2010-03-17 09:01:47 +0000
commite7e9bfde47768b22be8b15c30c027dc8fb67c778 (patch)
treea5e2896a1b456c5f8d25130bb773005c01ef6ac3 /src/target/mips_ejtag.c
parent79ca05b106ef92915c4e9288cbf34d5db1cf4cd2 (diff)
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PIC32: add software reset support
The PIC32MX does not support the ejtag software reset - it is optional in the ejtag spec. We perform the equivalent using the microchip specific MTAP cmd's. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'src/target/mips_ejtag.c')
-rw-r--r--src/target/mips_ejtag.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 984b5353..cea8fa80 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -127,6 +127,37 @@ int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data)
return ERROR_OK;
}
+int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data)
+{
+ struct jtag_tap *tap;
+ tap = ejtag_info->tap;
+
+ if (tap == NULL)
+ return ERROR_FAIL;
+ struct scan_field field;
+ uint8_t t[4], r[4];
+ int retval;
+
+ field.num_bits = 8;
+ field.out_value = t;
+ buf_set_u32(field.out_value, 0, field.num_bits, *data);
+ field.in_value = r;
+
+ jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
+
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ LOG_ERROR("register read failed");
+ return retval;
+ }
+
+ *data = buf_get_u32(field.in_value, 0, 32);
+
+ keep_alive();
+
+ return ERROR_OK;
+}
+
int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info)
{
static const uint32_t code[] = {