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| author | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-03-16 12:54:08 +0000 |
|---|---|---|
| committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-03-17 09:01:47 +0000 |
| commit | e7e9bfde47768b22be8b15c30c027dc8fb67c778 (patch) | |
| tree | a5e2896a1b456c5f8d25130bb773005c01ef6ac3 /src/target/mips_ejtag.h | |
| parent | 79ca05b106ef92915c4e9288cbf34d5db1cf4cd2 (diff) | |
| download | openocd+libswd-e7e9bfde47768b22be8b15c30c027dc8fb67c778.tar.gz openocd+libswd-e7e9bfde47768b22be8b15c30c027dc8fb67c778.tar.bz2 openocd+libswd-e7e9bfde47768b22be8b15c30c027dc8fb67c778.tar.xz openocd+libswd-e7e9bfde47768b22be8b15c30c027dc8fb67c778.zip | |
PIC32: add software reset support
The PIC32MX does not support the ejtag software reset - it is
optional in the ejtag spec.
We perform the equivalent using the microchip specific MTAP cmd's.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'src/target/mips_ejtag.h')
| -rw-r--r-- | src/target/mips_ejtag.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h index 5c1f2459..a086cd5e 100644 --- a/src/target/mips_ejtag.h +++ b/src/target/mips_ejtag.h @@ -43,6 +43,11 @@ /* microchip PIC32MX specific instructions */ #define MTAP_SW_MTAP 0x04 #define MTAP_SW_ETAP 0x05 +#define MTAP_COMMAND 0x07 + +/* microchip specific cmds */ +#define MCHP_ASERT_RST 0xd1 +#define MCHP_DE_ASSERT_RST 0xd0 /* ejtag control register bits ECR */ #define EJTAG_CTRL_TOF (1 << 1) @@ -130,6 +135,7 @@ int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info); int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode); int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode); int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data); +int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data); int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write, uint32_t *data); int mips_ejtag_init(struct mips_ejtag *ejtag_info); |