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authorDavid Brownell <dbrownell@users.sourceforge.net>2009-11-19 19:02:10 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-11-19 19:02:10 -0800
commit71cde5e359f273585880ea8986709b950ba85b08 (patch)
treeb04f841ddfe6c0900f48b676cbb6c84d12eea7a3 /src/target/mips_m4k.c
parent31fb7788a605fe1c0c405444b5bab51a7e42d481 (diff)
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target: create/use register_cache_invalidate()
Create a generic register_cache_invalidate(), and use it to replace three all-but-identical core-specific routines: - armv4_5_invalidate_core_regs() - armv7m_invalidate_core_regs - mips32_invalidate_core_regs() too. Make cache->num_regs be unsigned, avoiding various errors. Net code shrink and simplification. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/mips_m4k.c')
-rw-r--r--src/target/mips_m4k.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 864ede07..0a566c34 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -309,7 +309,7 @@ int mips_m4k_assert_reset(struct target *target)
target->state = TARGET_RESET;
jtag_add_sleep(50000);
- mips32_invalidate_core_regs(target);
+ register_cache_invalidate(mips32->core_cache);
if (target->reset_halt)
{
@@ -410,7 +410,7 @@ int mips_m4k_resume(struct target *target, int current, uint32_t address, int ha
target->debug_reason = DBG_REASON_NOTHALTED;
/* registers are now invalid */
- mips32_invalidate_core_regs(target);
+ register_cache_invalidate(mips32->core_cache);
if (!debug_execution)
{
@@ -467,7 +467,7 @@ int mips_m4k_step(struct target *target, int current, uint32_t address, int hand
mips_ejtag_exit_debug(ejtag_info);
/* registers are now invalid */
- mips32_invalidate_core_regs(target);
+ register_cache_invalidate(mips32->core_cache);
if (breakpoint)
mips_m4k_set_breakpoint(target, breakpoint);