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| author | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-03-16 12:48:53 +0000 |
|---|---|---|
| committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-03-17 09:01:45 +0000 |
| commit | 79ca05b106ef92915c4e9288cbf34d5db1cf4cd2 (patch) | |
| tree | c2a64462af3ec19f11a7748c62c20700db23bf9e /src/target/mips_m4k.c | |
| parent | 051e2c99ab8111f6bffdb412b40ceef333530ae6 (diff) | |
| download | openocd+libswd-79ca05b106ef92915c4e9288cbf34d5db1cf4cd2.tar.gz openocd+libswd-79ca05b106ef92915c4e9288cbf34d5db1cf4cd2.tar.bz2 openocd+libswd-79ca05b106ef92915c4e9288cbf34d5db1cf4cd2.tar.xz openocd+libswd-79ca05b106ef92915c4e9288cbf34d5db1cf4cd2.zip | |
MIPS: remove ejtag_srst variant
The mips_m4k_assert_reset has now been restructured
so the variant ejtag_srst is not required anymore.
The ejtag software reset will be used if the target does not
have srst connected.
Remove ejtag_srst from docs.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'src/target/mips_m4k.c')
| -rw-r--r-- | src/target/mips_m4k.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 389daf97..d3536d8f 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -212,18 +212,17 @@ int mips_m4k_halt(struct target *target) int mips_m4k_assert_reset(struct target *target) { - struct mips32_common *mips32 = target_to_mips32(target); - struct mips_ejtag *ejtag_info = &mips32->ejtag_info; + struct mips_m4k_common *mips_m4k = target_to_m4k(target); + struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info; + int assert_srst = 1; LOG_DEBUG("target->state: %s", target_state_name(target)); enum reset_types jtag_reset_config = jtag_get_reset_config(); + if (!(jtag_reset_config & RESET_HAS_SRST)) - { - LOG_ERROR("Can't assert SRST"); - return ERROR_FAIL; - } + assert_srst = 0; if (target->reset_halt) { @@ -237,14 +236,7 @@ int mips_m4k_assert_reset(struct target *target) mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL); } - if (strcmp(target->variant, "ejtag_srst") == 0) - { - uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST; - LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor..."); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL); - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); - } - else + if (assert_srst) { /* here we should issue a srst only, but we may have to assert trst as well */ if (jtag_reset_config & RESET_SRST_PULLS_TRST) @@ -256,11 +248,19 @@ int mips_m4k_assert_reset(struct target *target) jtag_add_reset(0, 1); } } + else + { + /* use ejtag reset - not supported by all cores */ + uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST; + LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor..."); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL); + mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + } target->state = TARGET_RESET; jtag_add_sleep(50000); - register_cache_invalidate(mips32->core_cache); + register_cache_invalidate(mips_m4k->mips32.core_cache); if (target->reset_halt) { |