summaryrefslogtreecommitdiff
path: root/src/target
diff options
context:
space:
mode:
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2009-09-17 11:23:41 +0000
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2009-09-17 11:23:41 +0000
commit016e7ebbfa034926c980b4b33b964f6078541690 (patch)
treef5bf6aaba52e21262ee88b4cf70c999c55bf9f6c /src/target
parentcb7ad25c0404147a0a60f04c3b8fa8ac7386bb29 (diff)
downloadopenocd+libswd-016e7ebbfa034926c980b4b33b964f6078541690.tar.gz
openocd+libswd-016e7ebbfa034926c980b4b33b964f6078541690.tar.bz2
openocd+libswd-016e7ebbfa034926c980b4b33b964f6078541690.tar.xz
openocd+libswd-016e7ebbfa034926c980b4b33b964f6078541690.zip
srst_gates_jtag option. at91sam9260 needs retesting, and possibly srst_gates_jtag added to reset_config. Could i.MX27 be a case where srst does not pull trst, but really srst gates jtag clock?
git-svn-id: svn://svn.berlios.de/openocd/trunk@2720 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target')
-rw-r--r--src/target/arm7_9_common.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 9f05d777..e2eb0d5c 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1021,6 +1021,17 @@ int arm7_9_assert_reset(target_t *target)
return ERROR_FAIL;
}
+ /* at this point trst has been asserted/deasserted once. We want to
+ * program embedded ice while SRST is asserted, but some CPUs gate
+ * the JTAG clock while SRST is asserted
+ */
+ bool srst_asserted = false;
+ if (((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0) && ((jtag_reset_config & RESET_SRST_GATES_JTAG) == 0))
+ {
+ jtag_add_reset(0, 1);
+ srst_asserted = true;
+ }
+
if (target->reset_halt)
{
/*
@@ -1053,7 +1064,7 @@ int arm7_9_assert_reset(target_t *target)
if (jtag_reset_config & RESET_SRST_PULLS_TRST)
{
jtag_add_reset(1, 1);
- } else
+ } else if (!srst_asserted)
{
jtag_add_reset(0, 1);
}