MIPS: merge mips fast_data patch from David N. Claffey

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>

7 files changed, 244 insertions, 7 deletions

diff --git a/src/target/mips32.c b/src/target/mips32.c
index e8ea541a..0f6f9b09 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -29,7 +29,6 @@
 #include "mips32.h"
 #include "register.h"
 
-
 char* mips32_core_reg_list[] =
 {
 	"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
diff --git a/src/target/mips32.h b/src/target/mips32.h
index 7d1928e5..9ad52938 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -77,6 +77,7 @@ struct mips32_core_reg
 #define MIPS32_OP_ADDI	0x08
 #define MIPS32_OP_AND	0x24
 #define MIPS32_OP_COP0	0x10
+#define MIPS32_OP_JR	0x08
 #define MIPS32_OP_LUI	0x0F
 #define MIPS32_OP_LW	0x23
 #define MIPS32_OP_LBU	0x24
@@ -103,6 +104,7 @@ struct mips32_core_reg
 #define MIPS32_B(off)				MIPS32_BEQ(0, 0, off)
 #define MIPS32_BEQ(src,tar,off)		MIPS32_I_INST(MIPS32_OP_BEQ, src, tar, off)
 #define MIPS32_BNE(src,tar,off)		MIPS32_I_INST(MIPS32_OP_BNE, src, tar, off)
+#define MIPS32_JR(reg)				MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_JR)
 #define MIPS32_MFC0(gpr, cpr, sel)	MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MF, gpr, cpr, 0, sel)
 #define MIPS32_MTC0(gpr,cpr, sel)	MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MT, gpr, cpr, 0, sel)
 #define MIPS32_LBU(reg, off, base)	MIPS32_I_INST(MIPS32_OP_LBU, base, reg, off)
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 604d34ed..34794f33 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -4,6 +4,8 @@
  *                                                                         *
  *   Copyright (C) 2008 by David T.L. Wong                                 *
  *                                                                         *
+ *   Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com>          *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -69,7 +71,6 @@ OpenOCD is used as a flash programmer or as a debug tool.
 Nico Coesel
 */
 
-
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
@@ -161,7 +162,6 @@ static int mips32_pracc_exec_read(struct mips32_pracc_context *ctx, uint32_t add
 	jtag_add_clocks(5);
 	jtag_execute_queue();
 
-
 	return ERROR_OK;
 }
 
@@ -254,7 +254,6 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, int code_len, const uint32_
 
 			if ((retval = mips32_pracc_exec_read(&ctx, address)) != ERROR_OK)
 				return retval;
-
 		}
 
 		if (cycle == 0)
@@ -933,3 +932,149 @@ int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs)
 
 	return retval;
 }
+
+/* fastdata upload/download requires an initialized working area
+ * to load the download code; it should not be called otherwise
+ * fetch order from the fastdata area
+ * 1. start addr
+ * 2. end addr
+ * 3. data ...
+ */
+int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source,
+								int write, uint32_t addr, int count, uint32_t *buf)
+{
+	uint32_t handler_code[] = {
+		/* caution when editing, table is modified below */
+		/* r15 points to the start of this code */
+		MIPS32_SW(8,MIPS32_FASTDATA_HANDLER_SIZE - 4,15),
+		MIPS32_SW(9,MIPS32_FASTDATA_HANDLER_SIZE - 8,15),
+		MIPS32_SW(10,MIPS32_FASTDATA_HANDLER_SIZE - 12,15),
+		MIPS32_SW(11,MIPS32_FASTDATA_HANDLER_SIZE - 16,15),
+		/* start of fastdata area in t0 */
+		MIPS32_LUI(8,UPPER16(MIPS32_PRACC_FASTDATA_AREA)),
+		MIPS32_ORI(8,8,LOWER16(MIPS32_PRACC_FASTDATA_AREA)),
+		MIPS32_LW(9,0,8),								/* start addr in t1 */
+		MIPS32_LW(10,0,8),								/* end addr to t2 */
+														/* loop: */
+		/* 8 */ MIPS32_LW(11,0,0),						/* lw t3,[t8 | r9] */
+		/* 9 */ MIPS32_SW(11,0,0),						/* sw t3,[r9 | r8] */
+		MIPS32_BNE(10,9,NEG16(3)),						/* bne $t2,t1,loop */
+		MIPS32_ADDI(9,9,4),								/* addi t1,t1,4 */
+
+		MIPS32_LW(8,MIPS32_FASTDATA_HANDLER_SIZE - 4,15),
+		MIPS32_LW(9,MIPS32_FASTDATA_HANDLER_SIZE - 8,15),
+		MIPS32_LW(10,MIPS32_FASTDATA_HANDLER_SIZE - 12,15),
+		MIPS32_LW(11,MIPS32_FASTDATA_HANDLER_SIZE - 16,15),
+
+		MIPS32_LUI(15,UPPER16(MIPS32_PRACC_TEXT)),
+		MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_TEXT)),
+		MIPS32_JR(15),									/* jr start */
+		MIPS32_MFC0(15,31,0),							/* move COP0 DeSave to $15 */
+		MIPS32_NOP,
+	};
+
+	uint32_t jmp_code[] = {
+		MIPS32_MTC0(15,31,0),			/* move $15 to COP0 DeSave */
+		/* 1 */ MIPS32_LUI(15,0),		/* addr of working area added below */
+		/* 2 */ MIPS32_ORI(15,15,0),	/* addr of working area added below */
+		MIPS32_JR(15),					/* jump to ram program */
+		MIPS32_NOP,
+	};
+
+#define JMP_CODE_SIZE (sizeof(jmp_code)/sizeof(jmp_code[0]))
+#define HANDLER_CODE_SIZE sizeof(handler_code)/sizeof(handler_code[0])
+
+	int retval, i;
+	uint32_t val, ejtag_ctrl, address;
+
+	if (source->size < MIPS32_FASTDATA_HANDLER_SIZE)
+		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+
+	if (write)
+	{
+		handler_code[8] = MIPS32_LW(11,0,8);	/* load data from probe at fastdata area */
+		handler_code[9] = MIPS32_SW(11,0,9);	/* store data to RAM @ r9 */
+	}
+	else
+	{
+		handler_code[8] = MIPS32_LW(11,0,9);	/* load data from RAM @ r9 */
+		handler_code[9] = MIPS32_SW(11,0,8);	/* store data to probe at fastdata area */
+	}
+
+	/* write program into RAM */
+	mips32_pracc_write_mem32(ejtag_info, source->address, HANDLER_CODE_SIZE, handler_code);
+
+	/* quick verify RAM is working */
+	mips32_pracc_read_u32(ejtag_info, source->address, &val);
+	if (val != handler_code[0])
+	{
+		LOG_ERROR("fastdata handler verify failed\n");
+		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+	}
+
+	LOG_INFO("%s using 0x%.8x for write handler\n", __func__, source->address);
+
+	jmp_code[1] |= UPPER16(source->address);
+	jmp_code[2] |= LOWER16(source->address);
+
+	for (i = 0; i < (int) JMP_CODE_SIZE; i++)
+	{
+		if ((retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl)) != ERROR_OK)
+			return retval;
+
+		mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+		mips_ejtag_drscan_32(ejtag_info, &jmp_code[i]);
+
+		/* Clear the access pending bit (let the processor eat!) */
+
+		ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
+		mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+		mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+	}
+
+	if ((retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl)) != ERROR_OK)
+		return retval;
+
+	/* next fetch to dmseg should be in FASTDATA_AREA, check */
+	address = 0;
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+	mips_ejtag_drscan_32(ejtag_info, &address);
+
+	if (address != MIPS32_PRACC_FASTDATA_AREA)
+		return ERROR_FAIL;
+
+	/* Send the load start address */
+	val = addr;
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA, NULL);
+	mips_ejtag_fastdata_scan(ejtag_info, 1, &val);
+
+	/* Send the load end address */
+	val = addr + (count - 1) * 4;
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA, NULL);
+	mips_ejtag_fastdata_scan(ejtag_info, 1, &val);
+
+	for (i = 0; i < count; i++)
+	{
+		/* Send the data out using fastdata (clears the access pending bit) */
+		if ((retval = mips_ejtag_fastdata_scan(ejtag_info, write, buf++)) != ERROR_OK)
+			return retval;
+	}
+
+	if ((retval = jtag_execute_queue()) != ERROR_OK)
+	{
+		LOG_ERROR("fastdata load failed");
+		return retval;
+	}
+
+	if ((retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl)) != ERROR_OK)
+		return retval;
+
+	address = 0;
+	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+	mips_ejtag_drscan_32(ejtag_info, &address);
+
+	if (address != MIPS32_PRACC_TEXT)
+		LOG_ERROR("mini program did not return to start\n");
+
+	return retval;
+}
diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index 5d1cf3dd..41a7325d 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -22,8 +22,11 @@
 #ifndef MIPS32_PRACC_H
 #define MIPS32_PRACC_H
 
-#include "mips_ejtag.h"
+#include <target/mips32.h>
+#include <target/mips_ejtag.h>
 
+#define MIPS32_PRACC_FASTDATA_AREA		0xFF200000
+#define MIPS32_PRACC_FASTDATA_SIZE		16
 #define MIPS32_PRACC_TEXT			0xFF200200
 //#define MIPS32_PRACC_STACK			0xFF2FFFFC
 #define MIPS32_PRACC_STACK			0xFF204000
@@ -32,6 +35,7 @@
 #define MIPS32_PRACC_PARAM_OUT		(MIPS32_PRACC_PARAM_IN + MIPS32_PRACC_PARAM_IN_SIZE)
 #define MIPS32_PRACC_PARAM_OUT_SIZE	0x1000
 
+#define MIPS32_FASTDATA_HANDLER_SIZE	0x80
 #define UPPER16(uint32_t) (uint32_t >> 16)
 #define LOWER16(uint32_t) (uint32_t & 0xFFFF)
 #define NEG16(v) (((~(v)) + 1) & 0xFFFF)
@@ -41,6 +45,8 @@ int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info,
 		uint32_t addr, int size, int count, void *buf);
 int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info,
 		uint32_t addr, int size, int count, void *buf);
+int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source,
+		int write, uint32_t addr, int count, uint32_t *buf);
 
 int mips32_pracc_read_mem8(struct mips_ejtag *ejtag_info,
 		uint32_t addr, int count, uint8_t *buf);
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 68a39faf..6f7baf01 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -4,6 +4,8 @@
  *                                                                         *
  *   Copyright (C) 2008 by David T.L. Wong                                 *
  *                                                                         *
+ *   Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com>          *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -286,3 +288,42 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 
 	return ERROR_OK;
 }
+
+int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write, uint32_t *data)
+{
+	struct jtag_tap *tap;
+	tap = ejtag_info->tap;
+
+	if (tap == NULL)
+		return ERROR_FAIL;
+
+	struct scan_field fields[2];
+	uint8_t spracc = 0;
+	uint8_t t[4] = {0, 0, 0, 0};
+
+	/* fastdata 1-bit register */
+	fields[0].tap = tap;
+	fields[0].num_bits = 1;
+	fields[0].out_value = &spracc;
+	fields[0].in_value = NULL;
+
+	/* processor access data register 32 bit */
+	fields[1].tap = tap;
+	fields[1].num_bits = 32;
+	fields[1].out_value = t;
+
+	if (write)
+	{
+		fields[1].in_value = NULL;
+		buf_set_u32(t, 0, 32, *data);
+	}
+	else
+	{
+		fields[1].in_value = (uint8_t *) data;
+	}
+
+	jtag_add_dr_scan(2, fields, jtag_get_end_state());
+	keep_alive();
+
+	return ERROR_OK;
+}
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index 93b4a6ae..eb42d67f 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -118,6 +118,7 @@ int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
 int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode);
 int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
 int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data);
+int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write, uint32_t *data);
 
 int mips_ejtag_init(struct mips_ejtag *ejtag_info);
 int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step);
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index a83217ff..f3191ae6 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -4,6 +4,8 @@
  *                                                                         *
  *   Copyright (C) 2008 by David T.L. Wong                                 *
  *                                                                         *
+ *   Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com>          *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -30,7 +32,6 @@
 #include "target_type.h"
 #include "register.h"
 
-
 /* cli handling */
 
 /* forward declarations */
@@ -962,7 +963,49 @@ int mips_m4k_examine(struct target *target)
 
 int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
 {
-	return mips_m4k_write_memory(target, address, 4, count, buffer);
+	struct mips32_common *mips32 = target->arch_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
+	struct working_area *source;
+	int retval;
+	int write = 1;
+
+	LOG_DEBUG("address: 0x%8.8x, count: 0x%8.8x", address, count);
+
+	if (target->state != TARGET_HALTED)
+	{
+		LOG_WARNING("target not halted");
+		return ERROR_TARGET_NOT_HALTED;
+	}
+
+	/* check alignment */
+	if (address & 0x3u)
+		return ERROR_TARGET_UNALIGNED_ACCESS;
+
+	/* Get memory for block write handler */
+	retval = target_alloc_working_area(target, MIPS32_FASTDATA_HANDLER_SIZE, &source);
+	if (retval != ERROR_OK)
+	{
+		LOG_WARNING("No working area available, falling back to non-bulk write");
+		return mips_m4k_write_memory(target, address, 4, count, buffer);
+	}
+
+	/* TAP data register is loaded LSB first (little endian) */
+	if (target->endianness == TARGET_BIG_ENDIAN)
+	{
+		uint32_t i, t32;
+		for(i = 0; i < (count*4); i+=4)
+		{
+			t32 = be_to_h_u32((uint8_t *) &buffer[i]);
+			h_u32_to_le(&buffer[i], t32);
+		}
+	}
+
+	retval = mips32_pracc_fastdata_xfer(ejtag_info, source, write, address, count, (uint32_t *) buffer);
+
+	if (source)
+		target_free_working_area(target, source);
+
+	return retval;
 }
 
 int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum)