target_t -> struct target

Remove misleading typedef and redundant suffix from struct target.

60 files changed, 970 insertions, 972 deletions

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 0b1b9c0d..970ffa2c 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -262,10 +262,10 @@ static struct reg arm11_gdb_dummy_fps_reg =
 
 
 static int arm11_on_enter_debug_state(struct arm11_common *arm11);
-static int arm11_step(struct target_s *target, int current,
+static int arm11_step(struct target *target, int current,
 		uint32_t address, int handle_breakpoints);
 /* helpers */
-static int arm11_build_reg_cache(target_t *target);
+static int arm11_build_reg_cache(struct target *target);
 static int arm11_set_reg(struct reg *reg, uint8_t *buf);
 static int arm11_get_reg(struct reg *reg);
 
@@ -668,7 +668,7 @@ static void arm11_record_register_history(struct arm11_common *arm11)
 
 
 /* poll current target status */
-static int arm11_poll(struct target_s *target)
+static int arm11_poll(struct target *target)
 {
 	FNC_INFO;
 	int retval;
@@ -713,7 +713,7 @@ static int arm11_poll(struct target_s *target)
 	return ERROR_OK;
 }
 /* architecture specific status reply */
-static int arm11_arch_state(struct target_s *target)
+static int arm11_arch_state(struct target *target)
 {
 	struct arm11_common * arm11 = target->arch_info;
 
@@ -726,7 +726,7 @@ static int arm11_arch_state(struct target_s *target)
 }
 
 /* target request support */
-static int arm11_target_request_data(struct target_s *target,
+static int arm11_target_request_data(struct target *target,
 		uint32_t size, uint8_t *buffer)
 {
 	FNC_INFO_NOTIMPLEMENTED;
@@ -735,7 +735,7 @@ static int arm11_target_request_data(struct target_s *target,
 }
 
 /* target execution control */
-static int arm11_halt(struct target_s *target)
+static int arm11_halt(struct target *target)
 {
 	FNC_INFO;
 
@@ -800,7 +800,7 @@ static int arm11_halt(struct target_s *target)
 	return ERROR_OK;
 }
 
-static int arm11_resume(struct target_s *target, int current,
+static int arm11_resume(struct target *target, int current,
 		uint32_t address, int handle_breakpoints, int debug_execution)
 {
 	FNC_INFO;
@@ -995,7 +995,7 @@ static enum armv4_5_mode arm11_sim_get_mode(struct arm_sim_interface *sim)
 	return ARMV4_5_MODE_USR;
 }
 
-static int arm11_simulate_step(target_t *target, uint32_t *dry_run_pc)
+static int arm11_simulate_step(struct target *target, uint32_t *dry_run_pc)
 {
 	struct arm_sim_interface sim;
 
@@ -1013,7 +1013,7 @@ static int arm11_simulate_step(target_t *target, uint32_t *dry_run_pc)
 
 }
 
-static int arm11_step(struct target_s *target, int current,
+static int arm11_step(struct target *target, int current,
 		uint32_t address, int handle_breakpoints)
 {
 	FNC_INFO;
@@ -1169,7 +1169,7 @@ static int arm11_step(struct target_s *target, int current,
 	return ERROR_OK;
 }
 
-static int arm11_assert_reset(target_t *target)
+static int arm11_assert_reset(struct target *target)
 {
 	FNC_INFO;
 	int retval;
@@ -1231,12 +1231,12 @@ static int arm11_assert_reset(target_t *target)
 	return ERROR_OK;
 }
 
-static int arm11_deassert_reset(target_t *target)
+static int arm11_deassert_reset(struct target *target)
 {
 	return ERROR_OK;
 }
 
-static int arm11_soft_reset_halt(struct target_s *target)
+static int arm11_soft_reset_halt(struct target *target)
 {
 	FNC_INFO_NOTIMPLEMENTED;
 
@@ -1244,7 +1244,7 @@ static int arm11_soft_reset_halt(struct target_s *target)
 }
 
 /* target register access for gdb */
-static int arm11_get_gdb_reg_list(struct target_s *target,
+static int arm11_get_gdb_reg_list(struct target *target,
 		struct reg **reg_list[], int *reg_list_size)
 {
 	FNC_INFO;
@@ -1280,7 +1280,7 @@ static int arm11_get_gdb_reg_list(struct target_s *target,
  * to read/write a range of data to a "port". a "port" is an action on
  * read memory address for some peripheral.
  */
-static int arm11_read_memory_inner(struct target_s *target,
+static int arm11_read_memory_inner(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer,
 		bool arm11_config_memrw_no_increment)
 {
@@ -1368,7 +1368,7 @@ static int arm11_read_memory_inner(struct target_s *target,
 	return arm11_run_instr_data_finish(arm11);
 }
 
-static int arm11_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+static int arm11_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	return arm11_read_memory_inner(target, address, size, count, buffer, false);
 }
@@ -1378,7 +1378,7 @@ static int arm11_read_memory(struct target_s *target, uint32_t address, uint32_t
 * to read/write a range of data to a "port". a "port" is an action on
 * read memory address for some peripheral.
 */
-static int arm11_write_memory_inner(struct target_s *target,
+static int arm11_write_memory_inner(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer,
 		bool arm11_config_memrw_no_increment)
 {
@@ -1517,14 +1517,14 @@ static int arm11_write_memory_inner(struct target_s *target,
 	return arm11_run_instr_data_finish(arm11);
 }
 
-static int arm11_write_memory(struct target_s *target,
+static int arm11_write_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	return arm11_write_memory_inner(target, address, size, count, buffer, false);
 }
 
 /* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
-static int arm11_bulk_write_memory(struct target_s *target,
+static int arm11_bulk_write_memory(struct target *target,
 		uint32_t address, uint32_t count, uint8_t *buffer)
 {
 	FNC_INFO;
@@ -1542,7 +1542,7 @@ static int arm11_bulk_write_memory(struct target_s *target,
  * fallback code will read data from the target and calculate the CRC on the
  * host.
  */
-static int arm11_checksum_memory(struct target_s *target,
+static int arm11_checksum_memory(struct target *target,
 		uint32_t address, uint32_t count, uint32_t* checksum)
 {
 	return ERROR_FAIL;
@@ -1551,7 +1551,7 @@ static int arm11_checksum_memory(struct target_s *target,
 /* target break-/watchpoint control
 * rw: 0 = write, 1 = read, 2 = access
 */
-static int arm11_add_breakpoint(struct target_s *target,
+static int arm11_add_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	FNC_INFO;
@@ -1583,7 +1583,7 @@ static int arm11_add_breakpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int arm11_remove_breakpoint(struct target_s *target,
+static int arm11_remove_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	FNC_INFO;
@@ -1595,7 +1595,7 @@ static int arm11_remove_breakpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int arm11_add_watchpoint(struct target_s *target,
+static int arm11_add_watchpoint(struct target *target,
 		struct watchpoint *watchpoint)
 {
 	FNC_INFO_NOTIMPLEMENTED;
@@ -1603,7 +1603,7 @@ static int arm11_add_watchpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int arm11_remove_watchpoint(struct target_s *target,
+static int arm11_remove_watchpoint(struct target *target,
 		struct watchpoint *watchpoint)
 {
 	FNC_INFO_NOTIMPLEMENTED;
@@ -1613,7 +1613,7 @@ static int arm11_remove_watchpoint(struct target_s *target,
 
 // HACKHACKHACK - FIXME mode/state
 /* target algorithm support */
-static int arm11_run_algorithm(struct target_s *target,
+static int arm11_run_algorithm(struct target *target,
 		int num_mem_params, struct mem_param *mem_params,
 		int num_reg_params, struct reg_param *reg_params,
 		uint32_t entry_point, uint32_t exit_point,
@@ -1779,7 +1779,7 @@ restore:
 	return retval;
 }
 
-static int arm11_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm11_target_create(struct target *target, Jim_Interp *interp)
 {
 	FNC_INFO;
 
@@ -1802,14 +1802,14 @@ static int arm11_target_create(struct target_s *target, Jim_Interp *interp)
 }
 
 static int arm11_init_target(struct command_context_s *cmd_ctx,
-		struct target_s *target)
+		struct target *target)
 {
 	/* Initialize anything we can set up without talking to the target */
 	return arm11_build_reg_cache(target);
 }
 
 /* talk to the target and set things up */
-static int arm11_examine(struct target_s *target)
+static int arm11_examine(struct target *target)
 {
 	int retval;
 
@@ -1895,7 +1895,7 @@ static int arm11_get_reg(struct reg *reg)
 {
 	FNC_INFO;
 
-	target_t * target = ((struct arm11_reg_state *)reg->arch_info)->target;
+	struct target * target = ((struct arm11_reg_state *)reg->arch_info)->target;
 
 	if (target->state != TARGET_HALTED)
 	{
@@ -1918,7 +1918,7 @@ static int arm11_set_reg(struct reg *reg, uint8_t *buf)
 {
 	FNC_INFO;
 
-	target_t * target = ((struct arm11_reg_state *)reg->arch_info)->target;
+	struct target * target = ((struct arm11_reg_state *)reg->arch_info)->target;
 	struct arm11_common *arm11 = target->arch_info;
 //	  const struct arm11_reg_defs * arm11_reg_info = arm11_reg_defs + ((struct arm11_reg_state *)reg->arch_info)->def_index;
 
@@ -1929,7 +1929,7 @@ static int arm11_set_reg(struct reg *reg, uint8_t *buf)
 	return ERROR_OK;
 }
 
-static int arm11_build_reg_cache(target_t *target)
+static int arm11_build_reg_cache(struct target *target)
 {
 	struct arm11_common *arm11 = target->arch_info;
 
@@ -2067,7 +2067,7 @@ static const uint32_t arm11_coproc_instruction_limits[] =
 static struct arm11_common * arm11_find_target(const char * arg)
 {
 	struct jtag_tap *	tap;
-	target_t *		t;
+	struct target *		t;
 
 	tap = jtag_tap_by_string(arg);
 
@@ -2087,7 +2087,7 @@ static struct arm11_common * arm11_find_target(const char * arg)
 	return 0;
 }
 
-static int arm11_mrc_inner(target_t *target, int cpnum,
+static int arm11_mrc_inner(struct target *target, int cpnum,
 		uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm,
 		uint32_t *value, bool read)
 {
@@ -2131,13 +2131,13 @@ static int arm11_mrc_inner(target_t *target, int cpnum,
 	return arm11_run_instr_data_finish(arm11);
 }
 
-static int arm11_mrc(target_t *target, int cpnum,
+static int arm11_mrc(struct target *target, int cpnum,
 		uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, value, true);
 }
 
-static int arm11_mcr(target_t *target, int cpnum,
+static int arm11_mcr(struct target *target, int cpnum,
 		uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
diff --git a/src/target/arm11.h b/src/target/arm11.h
index 6bc1a251..ae6a93ca 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -80,7 +80,7 @@ enum arm11_debug_version
 
 struct arm11_common
 {
-	target_t *	target;		/**< Reference back to the owner */
+	struct target *	target;		/**< Reference back to the owner */
 
 	/** \name Processor type detection */
 	/*@{*/
@@ -179,7 +179,7 @@ enum arm11_sc7
 struct arm11_reg_state
 {
 	uint32_t				def_index;
-	target_t *			target;
+	struct target *			target;
 };
 
 int arm11_register_commands(struct command_context_s *cmd_ctx);
diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index 7f2b4038..ad4b12e0 100644
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -38,7 +38,7 @@
 #define _DEBUG_INSTRUCTION_EXECUTION_
 #endif
 
-static int arm720t_scan_cp15(target_t *target,
+static int arm720t_scan_cp15(struct target *target,
 		uint32_t out, uint32_t *in, int instruction, int clock)
 {
 	int retval;
@@ -102,7 +102,7 @@ static int arm720t_scan_cp15(target_t *target,
 	return ERROR_OK;
 }
 
-static int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value)
+static int arm720t_read_cp15(struct target *target, uint32_t opcode, uint32_t *value)
 {
 	/* fetch CP15 opcode */
 	arm720t_scan_cp15(target, opcode, NULL, 1, 1);
@@ -119,7 +119,7 @@ static int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value)
 	return ERROR_OK;
 }
 
-static int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value)
+static int arm720t_write_cp15(struct target *target, uint32_t opcode, uint32_t value)
 {
 	/* fetch CP15 opcode */
 	arm720t_scan_cp15(target, opcode, NULL, 1, 1);
@@ -135,7 +135,7 @@ static int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value)
 	return ERROR_OK;
 }
 
-static uint32_t arm720t_get_ttb(target_t *target)
+static uint32_t arm720t_get_ttb(struct target *target)
 {
 	uint32_t ttb = 0x0;
 
@@ -147,7 +147,7 @@ static uint32_t arm720t_get_ttb(target_t *target)
 	return ttb;
 }
 
-static void arm720t_disable_mmu_caches(target_t *target,
+static void arm720t_disable_mmu_caches(struct target *target,
 		int mmu, int d_u_cache, int i_cache)
 {
 	uint32_t cp15_control;
@@ -165,7 +165,7 @@ static void arm720t_disable_mmu_caches(target_t *target,
 	arm720t_write_cp15(target, 0xee010f10, cp15_control);
 }
 
-static void arm720t_enable_mmu_caches(target_t *target,
+static void arm720t_enable_mmu_caches(struct target *target,
 		int mmu, int d_u_cache, int i_cache)
 {
 	uint32_t cp15_control;
@@ -183,7 +183,7 @@ static void arm720t_enable_mmu_caches(target_t *target,
 	arm720t_write_cp15(target, 0xee010f10, cp15_control);
 }
 
-static void arm720t_post_debug_entry(target_t *target)
+static void arm720t_post_debug_entry(struct target *target)
 {
 	struct arm720t_common *arm720t = target_to_arm720(target);
 
@@ -202,7 +202,7 @@ static void arm720t_post_debug_entry(target_t *target)
 	jtag_execute_queue();
 }
 
-static void arm720t_pre_restore_context(target_t *target)
+static void arm720t_pre_restore_context(struct target *target)
 {
 	struct arm720t_common *arm720t = target_to_arm720(target);
 
@@ -221,7 +221,7 @@ static int arm720t_verify_pointer(struct command_context_s *cmd_ctx,
 	return ERROR_OK;
 }
 
-static int arm720t_arch_state(struct target_s *target)
+static int arm720t_arch_state(struct target *target)
 {
 	struct arm720t_common *arm720t = target_to_arm720(target);
 	struct armv4_5_common_s *armv4_5;
@@ -247,7 +247,7 @@ static int arm720t_arch_state(struct target_s *target)
 	return ERROR_OK;
 }
 
-static int arm720_mmu(struct target_s *target, int *enabled)
+static int arm720_mmu(struct target *target, int *enabled)
 {
 	if (target->state != TARGET_HALTED) {
 		LOG_ERROR("%s: target not halted", __func__);
@@ -258,7 +258,7 @@ static int arm720_mmu(struct target_s *target, int *enabled)
 	return ERROR_OK;
 }
 
-static int arm720_virt2phys(struct target_s *target,
+static int arm720_virt2phys(struct target *target,
 		uint32_t virt, uint32_t *phys)
 {
 	/** @todo Implement this!  */
@@ -266,7 +266,7 @@ static int arm720_virt2phys(struct target_s *target,
 	return ERROR_FAIL;
 }
 
-static int arm720t_read_memory(struct target_s *target,
+static int arm720t_read_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	int retval;
@@ -284,7 +284,7 @@ static int arm720t_read_memory(struct target_s *target,
 	return retval;
 }
 
-static int arm720t_read_phys_memory(struct target_s *target,
+static int arm720t_read_phys_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct arm720t_common *arm720t = target_to_arm720(target);
@@ -292,7 +292,7 @@ static int arm720t_read_phys_memory(struct target_s *target,
 	return armv4_5_mmu_read_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer);
 }
 
-static int arm720t_write_phys_memory(struct target_s *target,
+static int arm720t_write_phys_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct arm720t_common *arm720t = target_to_arm720(target);
@@ -300,7 +300,7 @@ static int arm720t_write_phys_memory(struct target_s *target,
 	return armv4_5_mmu_write_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer);
 }
 
-static int arm720t_soft_reset_halt(struct target_s *target)
+static int arm720t_soft_reset_halt(struct target *target)
 {
 	int retval = ERROR_OK;
 	struct arm720t_common *arm720t = target_to_arm720(target);
@@ -371,12 +371,12 @@ static int arm720t_soft_reset_halt(struct target_s *target)
 	return ERROR_OK;
 }
 
-static int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+static int arm720t_init_target(struct command_context_s *cmd_ctx, struct target *target)
 {
 	return arm7tdmi_init_target(cmd_ctx, target);
 }
 
-static int arm720t_init_arch_info(target_t *target,
+static int arm720t_init_arch_info(struct target *target,
 		struct arm720t_common *arm720t, struct jtag_tap *tap)
 {
 	struct arm7tdmi_common *arm7tdmi = &arm720t->arm7tdmi_common;
@@ -401,7 +401,7 @@ static int arm720t_init_arch_info(target_t *target,
 	return ERROR_OK;
 }
 
-static int arm720t_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm720t_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm720t_common *arm720t = calloc(1, sizeof(*arm720t));
 
@@ -412,7 +412,7 @@ static int arm720t_target_create(struct target_s *target, Jim_Interp *interp)
 COMMAND_HANDLER(arm720t_handle_cp15_command)
 {
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm720t_common *arm720t = target_to_arm720(target);
 	struct arm_jtag *jtag_info;
 
@@ -467,7 +467,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
 	return ERROR_OK;
 }
 
-static int arm720t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	if (cpnum!=15)
 	{
@@ -479,7 +479,7 @@ static int arm720t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2,
 
 }
 
-static int arm720t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int arm720t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	if (cpnum!=15)
 	{
diff --git a/src/target/arm720t.h b/src/target/arm720t.h
index ab9aef6a..6bbac242 100644
--- a/src/target/arm720t.h
+++ b/src/target/arm720t.h
@@ -36,7 +36,7 @@ struct arm720t_common
 };
 
 static inline struct arm720t_common *
-target_to_arm720(struct target_s *target)
+target_to_arm720(struct target *target)
 {
 	return container_of(target->arch_info, struct arm720t_common,
 			arm7tdmi_common.arm7_9_common.armv4_5_common);
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 0523d829..2d3fe15d 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -37,7 +37,7 @@
 #include "arm_simulator.h"
 
 
-int arm7_9_debug_entry(target_t *target);
+int arm7_9_debug_entry(struct target *target);
 
 /**
  * Clear watchpoints for an ARM7/9 target.
@@ -159,7 +159,7 @@ static int arm7_9_set_software_breakpoints(struct arm7_9_common *arm7_9)
  * @param target Pointer to an ARM7/9 target to setup
  * @return Result of clearing the watchpoints on the target
  */
-int arm7_9_setup(target_t *target)
+int arm7_9_setup(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
@@ -178,7 +178,7 @@ int arm7_9_setup(target_t *target)
  *                 targets
  * @return ERROR_OK if successful
  */
-int arm7_9_get_arch_pointers(target_t *target, struct arm **armv4_5_p, struct arm7_9_common **arm7_9_p)
+int arm7_9_get_arch_pointers(struct target *target, struct arm **armv4_5_p, struct arm7_9_common **arm7_9_p)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -210,7 +210,7 @@ int arm7_9_get_arch_pointers(target_t *target, struct arm **armv4_5_p, struct ar
  *         queue.  For software breakpoints, this will be the status of the
  *         required memory reads and writes
  */
-int arm7_9_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+int arm7_9_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	int retval = ERROR_OK;
@@ -339,7 +339,7 @@ int arm7_9_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint
  *         queue.  For software breakpoints, this will be the status of the
  *         required memory reads and writes
  */
-int arm7_9_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -434,7 +434,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoi
  * @return An error status if there is a problem adding the breakpoint or the
  *         result of setting the breakpoint
  */
-int arm7_9_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+int arm7_9_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
@@ -484,7 +484,7 @@ int arm7_9_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint
  * @return Error status if there was a problem unsetting the breakpoint or the
  *         watchpoints could not be cleared
  */
-int arm7_9_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+int arm7_9_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -520,7 +520,7 @@ int arm7_9_remove_breakpoint(struct target_s *target, struct breakpoint *breakpo
  * @return Error status if watchpoint set fails or the result of executing the
  *         JTAG queue
  */
-int arm7_9_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -591,7 +591,7 @@ int arm7_9_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint
  * @return Error status while trying to unset the watchpoint or the result of
  *         executing the JTAG queue
  */
-int arm7_9_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+int arm7_9_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -639,7 +639,7 @@ int arm7_9_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoi
  * @param watchpoint Pointer to the watchpoint to be added
  * @return Error status while trying to add the watchpoint
  */
-int arm7_9_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+int arm7_9_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
@@ -672,7 +672,7 @@ int arm7_9_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint
  * @param watchpoint Pointer to the watchpoint to be removed
  * @return Result of trying to unset the watchpoint
  */
-int arm7_9_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+int arm7_9_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -699,7 +699,7 @@ int arm7_9_remove_watchpoint(struct target_s *target, struct watchpoint *watchpo
  * @return Error status if there is a timeout or a problem while executing the
  *         JTAG queue
  */
-int arm7_9_execute_sys_speed(struct target_s *target)
+int arm7_9_execute_sys_speed(struct target *target)
 {
 	int retval;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -750,7 +750,7 @@ int arm7_9_execute_sys_speed(struct target_s *target)
  * @param target Pointer to the target to issue commands to
  * @return Always ERROR_OK
  */
-int arm7_9_execute_fast_sys_speed(struct target_s *target)
+int arm7_9_execute_fast_sys_speed(struct target *target)
 {
 	static int set = 0;
 	static uint8_t check_value[4], check_mask[4];
@@ -794,7 +794,7 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target)
  * @param buffer Pointer to the buffer that will hold the data
  * @return The result of receiving data from the Embedded ICE unit
  */
-int arm7_9_target_request_data(target_t *target, uint32_t size, uint8_t *buffer)
+int arm7_9_target_request_data(struct target *target, uint32_t size, uint8_t *buffer)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -822,14 +822,14 @@ int arm7_9_target_request_data(target_t *target, uint32_t size, uint8_t *buffer)
  * target is running and the DCC control register has the W bit high, this will
  * execute the request on the target.
  *
- * @param priv Void pointer expected to be a target_t pointer
+ * @param priv Void pointer expected to be a struct target pointer
  * @return ERROR_OK unless there are issues with the JTAG queue or when reading
  *                  from the Embedded ICE unit
  */
 int arm7_9_handle_target_request(void *priv)
 {
 	int retval = ERROR_OK;
-	target_t *target = priv;
+	struct target *target = priv;
 	if (!target_was_examined(target))
 		return ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -887,7 +887,7 @@ int arm7_9_handle_target_request(void *priv)
  * @param target Pointer to the ARM7/9 target to poll
  * @return ERROR_OK or an error status if a command fails
  */
-int arm7_9_poll(target_t *target)
+int arm7_9_poll(struct target *target)
 {
 	int retval;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -980,7 +980,7 @@ int arm7_9_poll(target_t *target)
  * @param target Pointer to an ARM7/9 target to assert reset on
  * @return ERROR_FAIL if the JTAG device does not have SRST, otherwise ERROR_OK
  */
-int arm7_9_assert_reset(target_t *target)
+int arm7_9_assert_reset(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
@@ -1072,7 +1072,7 @@ int arm7_9_assert_reset(target_t *target)
  * @param target Pointer to the target to have the reset deasserted
  * @return ERROR_OK or an error from polling or halting the target
  */
-int arm7_9_deassert_reset(target_t *target)
+int arm7_9_deassert_reset(struct target *target)
 {
 	int retval = ERROR_OK;
 	LOG_DEBUG("target->state: %s",
@@ -1112,7 +1112,7 @@ int arm7_9_deassert_reset(target_t *target)
  * @param target Pointer to the ARM7/9 target to have halt cleared
  * @return Always ERROR_OK
  */
-int arm7_9_clear_halt(target_t *target)
+int arm7_9_clear_halt(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct reg *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
@@ -1169,7 +1169,7 @@ int arm7_9_clear_halt(target_t *target)
  * @param target Pointer to the ARM7/9 target to be reset and halted by software
  * @return Error status if any of the commands fail, otherwise ERROR_OK
  */
-int arm7_9_soft_reset_halt(struct target_s *target)
+int arm7_9_soft_reset_halt(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -1282,7 +1282,7 @@ int arm7_9_soft_reset_halt(struct target_s *target)
  * @param target Pointer to the ARM7/9 target to be halted
  * @return Always ERROR_OK
  */
-int arm7_9_halt(target_t *target)
+int arm7_9_halt(struct target *target)
 {
 	if (target->state == TARGET_RESET)
 	{
@@ -1344,7 +1344,7 @@ int arm7_9_halt(target_t *target)
  * @param target Pointer to target that is entering debug mode
  * @return Error code if anything fails, otherwise ERROR_OK
  */
-int arm7_9_debug_entry(target_t *target)
+int arm7_9_debug_entry(struct target *target)
 {
 	int i;
 	uint32_t context[16];
@@ -1502,7 +1502,7 @@ int arm7_9_debug_entry(target_t *target)
  * @return Error if the target is not halted, has an invalid core mode, or if
  *         the JTAG queue fails to execute
  */
-int arm7_9_full_context(target_t *target)
+int arm7_9_full_context(struct target *target)
 {
 	int i;
 	int retval;
@@ -1595,7 +1595,7 @@ int arm7_9_full_context(target_t *target)
  * @return Error status if the target is not halted or the core mode in the
  *         armv4_5 struct is invalid.
  */
-int arm7_9_restore_context(target_t *target)
+int arm7_9_restore_context(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -1745,7 +1745,7 @@ int arm7_9_restore_context(target_t *target)
  * @param target Pointer to the ARM7/9 target to be restarted
  * @return Result of executing the JTAG queue
  */
-int arm7_9_restart_core(struct target_s *target)
+int arm7_9_restart_core(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -1768,7 +1768,7 @@ int arm7_9_restart_core(struct target_s *target)
  *
  * @param target Pointer to the ARM7/9 target to enable watchpoints on
  */
-void arm7_9_enable_watchpoints(struct target_s *target)
+void arm7_9_enable_watchpoints(struct target *target)
 {
 	struct watchpoint *watchpoint = target->watchpoints;
 
@@ -1786,7 +1786,7 @@ void arm7_9_enable_watchpoints(struct target_s *target)
  *
  * @param target Pointer to the ARM7/9 target to enable breakpoints on
  */
-void arm7_9_enable_breakpoints(struct target_s *target)
+void arm7_9_enable_breakpoints(struct target *target)
 {
 	struct breakpoint *breakpoint = target->breakpoints;
 
@@ -1798,7 +1798,7 @@ void arm7_9_enable_breakpoints(struct target_s *target)
 	}
 }
 
-int arm7_9_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
+int arm7_9_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -1958,7 +1958,7 @@ int arm7_9_resume(struct target_s *target, int current, uint32_t address, int ha
 	return ERROR_OK;
 }
 
-void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc)
+void arm7_9_enable_eice_step(struct target *target, uint32_t next_pc)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -1995,7 +1995,7 @@ void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc)
 	}
 }
 
-void arm7_9_disable_eice_step(target_t *target)
+void arm7_9_disable_eice_step(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
@@ -2010,7 +2010,7 @@ void arm7_9_disable_eice_step(target_t *target)
 	embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE]);
 }
 
-int arm7_9_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
+int arm7_9_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -2103,7 +2103,7 @@ int arm7_9_step(struct target_s *target, int current, uint32_t address, int hand
 	return err;
 }
 
-int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode)
+int arm7_9_read_core_reg(struct target *target, int num, enum armv4_5_mode mode)
 {
 	uint32_t* reg_p[16];
 	uint32_t value;
@@ -2169,7 +2169,7 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod
 	return ERROR_OK;
 }
 
-int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, uint32_t value)
+int arm7_9_write_core_reg(struct target *target, int num, enum armv4_5_mode mode, uint32_t value)
 {
 	uint32_t reg[16];
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -2230,7 +2230,7 @@ int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mo
 	return jtag_execute_queue();
 }
 
-int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int arm7_9_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -2405,7 +2405,7 @@ int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size,
 	return ERROR_OK;
 }
 
-int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -2591,7 +2591,7 @@ int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size
 static int dcc_count;
 static uint8_t *dcc_buffer;
 
-static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info)
+static int arm7_9_dcc_completion(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -2654,9 +2654,9 @@ static const uint32_t dcc_code[] =
 	0xeafffff9	/*    b   w                   */
 };
 
-int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info));
+int armv4_5_run_algorithm_inner(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info));
 
-int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer)
+int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
 {
 	int retval;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -2721,7 +2721,7 @@ int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count,
 	return retval;
 }
 
-int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum)
+int arm7_9_checksum_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* checksum)
 {
 	struct working_area *crc_algorithm;
 	struct armv4_5_algorithm armv4_5_info;
@@ -2805,7 +2805,7 @@ int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t c
 	return ERROR_OK;
 }
 
-int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank)
+int arm7_9_blank_check_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* blank)
 {
 	struct working_area *erase_check_algorithm;
 	struct reg_param reg_params[3];
@@ -2876,7 +2876,7 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_command)
 	uint32_t value;
 	int spsr;
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm *armv4_5;
 	struct arm7_9_common *arm7_9;
 
@@ -2921,7 +2921,7 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_im8_command)
 	int rotate;
 	int spsr;
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm *armv4_5;
 	struct arm7_9_common *arm7_9;
 
@@ -2962,7 +2962,7 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command)
 	uint32_t value;
 	uint32_t mode;
 	int num;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm *armv4_5;
 	struct arm7_9_common *arm7_9;
 
@@ -2993,7 +2993,7 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command)
 
 COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm *armv4_5;
 	struct arm7_9_common *arm7_9;
 
@@ -3026,7 +3026,7 @@ COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
 
 COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm *armv4_5;
 	struct arm7_9_common *arm7_9;
 
@@ -3059,7 +3059,7 @@ COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
 
 COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm *armv4_5;
 	struct arm7_9_common *arm7_9;
 
@@ -3090,7 +3090,7 @@ COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
 	return ERROR_OK;
 }
 
-int arm7_9_init_arch_info(target_t *target, struct arm7_9_common *arm7_9)
+int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9)
 {
 	int retval = ERROR_OK;
 	struct arm *armv4_5 = &arm7_9->armv4_5_common;
diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h
index 41858c68..2c50b717 100644
--- a/src/target/arm7_9_common.h
+++ b/src/target/arm7_9_common.h
@@ -71,45 +71,45 @@ struct arm7_9_common
 
 	struct working_area *dcc_working_area;
 
-	int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */
+	int (*examine_debug_reason)(struct target *target); /**< Function for determining why debug state was entered */
 
-	void (*change_to_arm)(target_t *target, uint32_t *r0, uint32_t *pc); /**< Function for changing from Thumb to ARM mode */
+	void (*change_to_arm)(struct target *target, uint32_t *r0, uint32_t *pc); /**< Function for changing from Thumb to ARM mode */
 
-	void (*read_core_regs)(target_t *target, uint32_t mask, uint32_t *core_regs[16]); /**< Function for reading the core registers */
-	void (*read_core_regs_target_buffer)(target_t *target, uint32_t mask, void *buffer, int size);
-	void (*read_xpsr)(target_t *target, uint32_t *xpsr, int spsr); /**< Function for reading CPSR or SPSR */
+	void (*read_core_regs)(struct target *target, uint32_t mask, uint32_t *core_regs[16]); /**< Function for reading the core registers */
+	void (*read_core_regs_target_buffer)(struct target *target, uint32_t mask, void *buffer, int size);
+	void (*read_xpsr)(struct target *target, uint32_t *xpsr, int spsr); /**< Function for reading CPSR or SPSR */
 
-	void (*write_xpsr)(target_t *target, uint32_t xpsr, int spsr); /**< Function for writing to CPSR or SPSR */
-	void (*write_xpsr_im8)(target_t *target, uint8_t xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */
-	void (*write_core_regs)(target_t *target, uint32_t mask, uint32_t core_regs[16]);
+	void (*write_xpsr)(struct target *target, uint32_t xpsr, int spsr); /**< Function for writing to CPSR or SPSR */
+	void (*write_xpsr_im8)(struct target *target, uint8_t xpsr_im, int rot, int spsr); /**< Function for writing an immediate value to CPSR or SPSR */
+	void (*write_core_regs)(struct target *target, uint32_t mask, uint32_t core_regs[16]);
 
-	void (*load_word_regs)(target_t *target, uint32_t mask);
-	void (*load_hword_reg)(target_t *target, int num);
-	void (*load_byte_reg)(target_t *target, int num);
+	void (*load_word_regs)(struct target *target, uint32_t mask);
+	void (*load_hword_reg)(struct target *target, int num);
+	void (*load_byte_reg)(struct target *target, int num);
 
-	void (*store_word_regs)(target_t *target, uint32_t mask);
-	void (*store_hword_reg)(target_t *target, int num);
-	void (*store_byte_reg)(target_t *target, int num);
+	void (*store_word_regs)(struct target *target, uint32_t mask);
+	void (*store_hword_reg)(struct target *target, int num);
+	void (*store_byte_reg)(struct target *target, int num);
 
-	void (*write_pc)(target_t *target, uint32_t pc); /**< Function for writing to the program counter */
-	void (*branch_resume)(target_t *target);
-	void (*branch_resume_thumb)(target_t *target);
+	void (*write_pc)(struct target *target, uint32_t pc); /**< Function for writing to the program counter */
+	void (*branch_resume)(struct target *target);
+	void (*branch_resume_thumb)(struct target *target);
 
-	void (*enable_single_step)(target_t *target, uint32_t next_pc);
-	void (*disable_single_step)(target_t *target);
+	void (*enable_single_step)(struct target *target, uint32_t next_pc);
+	void (*disable_single_step)(struct target *target);
 
-	void (*set_special_dbgrq)(target_t *target); /**< Function for setting DBGRQ if the normal way won't work */
+	void (*set_special_dbgrq)(struct target *target); /**< Function for setting DBGRQ if the normal way won't work */
 
-	void (*post_debug_entry)(target_t *target); /**< Callback function called after entering debug mode */
+	void (*post_debug_entry)(struct target *target); /**< Callback function called after entering debug mode */
 
-	void (*pre_restore_context)(target_t *target); /**< Callback function called before restoring the processor context */
-	void (*post_restore_context)(target_t *target); /**< Callback function called after restoring the processor context */
+	void (*pre_restore_context)(struct target *target); /**< Callback function called before restoring the processor context */
+	void (*post_restore_context)(struct target *target); /**< Callback function called after restoring the processor context */
 
 
 };
 
 static inline struct arm7_9_common *
-target_to_arm7_9(struct target_s *target)
+target_to_arm7_9(struct target *target)
 {
 	return container_of(target->arch_info, struct arm7_9_common,
 			armv4_5_common);
@@ -117,43 +117,43 @@ target_to_arm7_9(struct target_s *target)
 
 int arm7_9_register_commands(struct command_context_s *cmd_ctx);
 
-int arm7_9_poll(target_t *target);
+int arm7_9_poll(struct target *target);
 
-int arm7_9_target_request_data(target_t *target, uint32_t size, uint8_t *buffer);
+int arm7_9_target_request_data(struct target *target, uint32_t size, uint8_t *buffer);
 
-int arm7_9_setup(target_t *target);
-int arm7_9_assert_reset(target_t *target);
-int arm7_9_deassert_reset(target_t *target);
-int arm7_9_reset_request_halt(target_t *target);
-int arm7_9_early_halt(target_t *target);
-int arm7_9_soft_reset_halt(struct target_s *target);
-int arm7_9_prepare_reset_halt(struct target_s *target);
+int arm7_9_setup(struct target *target);
+int arm7_9_assert_reset(struct target *target);
+int arm7_9_deassert_reset(struct target *target);
+int arm7_9_reset_request_halt(struct target *target);
+int arm7_9_early_halt(struct target *target);
+int arm7_9_soft_reset_halt(struct target *target);
+int arm7_9_prepare_reset_halt(struct target *target);
 
-int arm7_9_halt(target_t *target);
-int arm7_9_full_context(target_t *target);
-int arm7_9_restore_context(target_t *target);
-int arm7_9_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
-int arm7_9_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
-int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode);
-int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer);
-int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum);
-int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank);
+int arm7_9_halt(struct target *target);
+int arm7_9_full_context(struct target *target);
+int arm7_9_restore_context(struct target *target);
+int arm7_9_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+int arm7_9_step(struct target *target, int current, uint32_t address, int handle_breakpoints);
+int arm7_9_read_core_reg(struct target *target, int num, enum armv4_5_mode mode);
+int arm7_9_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer);
+int arm7_9_checksum_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* checksum);
+int arm7_9_blank_check_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* blank);
 
-int arm7_9_run_algorithm(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_prams, struct reg_param *reg_param, uint32_t entry_point, void *arch_info);
+int arm7_9_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_prams, struct reg_param *reg_param, uint32_t entry_point, void *arch_info);
 
-int arm7_9_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint);
-int arm7_9_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint);
-int arm7_9_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint);
-int arm7_9_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint);
+int arm7_9_add_breakpoint(struct target *target, struct breakpoint *breakpoint);
+int arm7_9_remove_breakpoint(struct target *target, struct breakpoint *breakpoint);
+int arm7_9_add_watchpoint(struct target *target, struct watchpoint *watchpoint);
+int arm7_9_remove_watchpoint(struct target *target, struct watchpoint *watchpoint);
 
-void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc);
-void arm7_9_disable_eice_step(target_t *target);
+void arm7_9_enable_eice_step(struct target *target, uint32_t next_pc);
+void arm7_9_disable_eice_step(struct target *target);
 
-int arm7_9_execute_sys_speed(struct target_s *target);
+int arm7_9_execute_sys_speed(struct target *target);
 
-int arm7_9_init_arch_info(target_t *target, struct arm7_9_common *arm7_9);
-int arm7_9_get_arch_pointers(target_t *target, struct arm **armv4_5_p, struct arm7_9_common **arm7_9_p);
+int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9);
+int arm7_9_get_arch_pointers(struct target *target, struct arm **armv4_5_p, struct arm7_9_common **arm7_9_p);
 
 #endif /* ARM7_9_COMMON_H */
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 1beae89a..c4cda7de 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -41,7 +41,7 @@
 #define _DEBUG_INSTRUCTION_EXECUTION_
 #endif
 
-static int arm7tdmi_examine_debug_reason(target_t *target)
+static int arm7tdmi_examine_debug_reason(struct target *target)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -263,7 +263,7 @@ static int arm7tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
 	return ERROR_OK;
 }
 
-static void arm7tdmi_change_to_arm(target_t *target,
+static void arm7tdmi_change_to_arm(struct target *target,
 		uint32_t *r0, uint32_t *pc)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -319,7 +319,7 @@ static void arm7tdmi_change_to_arm(target_t *target,
  * The solution is to arrange for a large out/in scan in this loop and
  * and convert data afterwards.
  */
-static void arm7tdmi_read_core_regs(target_t *target,
+static void arm7tdmi_read_core_regs(struct target *target,
 		uint32_t mask, uint32_t* core_regs[16])
 {
 	int i;
@@ -344,7 +344,7 @@ static void arm7tdmi_read_core_regs(target_t *target,
 	}
 }
 
-static void arm7tdmi_read_core_regs_target_buffer(target_t *target,
+static void arm7tdmi_read_core_regs_target_buffer(struct target *target,
 		uint32_t mask, void* buffer, int size)
 {
 	int i;
@@ -386,7 +386,7 @@ static void arm7tdmi_read_core_regs_target_buffer(target_t *target,
 	}
 }
 
-static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+static void arm7tdmi_read_xpsr(struct target *target, uint32_t *xpsr, int spsr)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -404,7 +404,7 @@ static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
 	arm7tdmi_clock_data_in(jtag_info, xpsr);
 }
 
-static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+static void arm7tdmi_write_xpsr(struct target *target, uint32_t xpsr, int spsr)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -433,7 +433,7 @@ static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 }
 
-static void arm7tdmi_write_xpsr_im8(target_t *target,
+static void arm7tdmi_write_xpsr_im8(struct target *target,
 		uint8_t xpsr_im, int rot, int spsr)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -451,7 +451,7 @@ static void arm7tdmi_write_xpsr_im8(target_t *target,
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 }
 
-static void arm7tdmi_write_core_regs(target_t *target,
+static void arm7tdmi_write_core_regs(struct target *target,
 		uint32_t mask, uint32_t core_regs[16])
 {
 	int i;
@@ -477,7 +477,7 @@ static void arm7tdmi_write_core_regs(target_t *target,
 	arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
 }
 
-static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
+static void arm7tdmi_load_word_regs(struct target *target, uint32_t mask)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -488,7 +488,7 @@ static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), NULL, 0);
 }
 
-static void arm7tdmi_load_hword_reg(target_t *target, int num)
+static void arm7tdmi_load_hword_reg(struct target *target, int num)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -499,7 +499,7 @@ static void arm7tdmi_load_hword_reg(target_t *target, int num)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRH_IP(num, 0), NULL, 0);
 }
 
-static void arm7tdmi_load_byte_reg(target_t *target, int num)
+static void arm7tdmi_load_byte_reg(struct target *target, int num)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -510,7 +510,7 @@ static void arm7tdmi_load_byte_reg(target_t *target, int num)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), NULL, 0);
 }
 
-static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
+static void arm7tdmi_store_word_regs(struct target *target, uint32_t mask)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -521,7 +521,7 @@ static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), NULL, 0);
 }
 
-static void arm7tdmi_store_hword_reg(target_t *target, int num)
+static void arm7tdmi_store_hword_reg(struct target *target, int num)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -532,7 +532,7 @@ static void arm7tdmi_store_hword_reg(target_t *target, int num)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), NULL, 0);
 }
 
-static void arm7tdmi_store_byte_reg(target_t *target, int num)
+static void arm7tdmi_store_byte_reg(struct target *target, int num)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -543,7 +543,7 @@ static void arm7tdmi_store_byte_reg(target_t *target, int num)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), NULL, 0);
 }
 
-static void arm7tdmi_write_pc(target_t *target, uint32_t pc)
+static void arm7tdmi_write_pc(struct target *target, uint32_t pc)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -568,7 +568,7 @@ static void arm7tdmi_write_pc(target_t *target, uint32_t pc)
 	arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
 }
 
-static void arm7tdmi_branch_resume(target_t *target)
+static void arm7tdmi_branch_resume(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -577,7 +577,7 @@ static void arm7tdmi_branch_resume(target_t *target)
 	arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_B(0xfffffa, 0), 0);
 }
 
-static void arm7tdmi_branch_resume_thumb(target_t *target)
+static void arm7tdmi_branch_resume_thumb(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -637,7 +637,7 @@ static void arm7tdmi_branch_resume_thumb(target_t *target)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f8), NULL, 0);
 }
 
-static void arm7tdmi_build_reg_cache(target_t *target)
+static void arm7tdmi_build_reg_cache(struct target *target)
 {
 	struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
@@ -646,7 +646,7 @@ static void arm7tdmi_build_reg_cache(target_t *target)
 	armv4_5->core_cache = (*cache_p);
 }
 
-int arm7tdmi_examine(struct target_s *target)
+int arm7tdmi_examine(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	int retval;
@@ -684,14 +684,14 @@ int arm7tdmi_examine(struct target_s *target)
 	return ERROR_OK;
 }
 
-int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target *target)
 {
 	arm7tdmi_build_reg_cache(target);
 
 	return ERROR_OK;
 }
 
-int arm7tdmi_init_arch_info(target_t *target, struct arm7tdmi_common *arm7tdmi, struct jtag_tap *tap)
+int arm7tdmi_init_arch_info(struct target *target, struct arm7tdmi_common *arm7tdmi, struct jtag_tap *tap)
 {
 	struct arm7_9_common *arm7_9 = &arm7tdmi->arm7_9_common;
 
@@ -741,7 +741,7 @@ int arm7tdmi_init_arch_info(target_t *target, struct arm7tdmi_common *arm7tdmi,
 	return ERROR_OK;
 }
 
-static int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm7tdmi_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm7tdmi_common *arm7tdmi;
 
diff --git a/src/target/arm7tdmi.h b/src/target/arm7tdmi.h
index 4faec180..4a0a1ed9 100644
--- a/src/target/arm7tdmi.h
+++ b/src/target/arm7tdmi.h
@@ -33,8 +33,8 @@ struct arm7tdmi_common
 	struct arm7_9_common arm7_9_common;
 };
 
-int arm7tdmi_init_arch_info(target_t *target, struct arm7tdmi_common *arm7tdmi, struct jtag_tap *tap);
-int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm7tdmi_examine(struct target_s *target);
+int arm7tdmi_init_arch_info(struct target *target, struct arm7tdmi_common *arm7tdmi, struct jtag_tap *tap);
+int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target *target);
+int arm7tdmi_examine(struct target *target);
 
 #endif /* ARM7TDMI_H */
diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 0173550d..577bf26e 100644
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -51,7 +51,7 @@
 
 #define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
 
-static int arm920t_read_cp15_physical(target_t *target,
+static int arm920t_read_cp15_physical(struct target *target,
 		int reg_addr, uint32_t *value)
 {
 	struct arm920t_common *arm920t = target_to_arm920(target);
@@ -103,7 +103,7 @@ static int arm920t_read_cp15_physical(target_t *target,
 	return ERROR_OK;
 }
 
-static int arm920t_write_cp15_physical(target_t *target,
+static int arm920t_write_cp15_physical(struct target *target,
 		int reg_addr, uint32_t value)
 {
 	struct arm920t_common *arm920t = target_to_arm920(target);
@@ -151,7 +151,7 @@ static int arm920t_write_cp15_physical(target_t *target,
 	return ERROR_OK;
 }
 
-static int arm920t_execute_cp15(target_t *target, uint32_t cp15_opcode,
+static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode,
 		uint32_t arm_opcode)
 {
 	int retval;
@@ -208,7 +208,7 @@ static int arm920t_execute_cp15(target_t *target, uint32_t cp15_opcode,
 	return ERROR_OK;
 }
 
-static int arm920t_read_cp15_interpreted(target_t *target,
+static int arm920t_read_cp15_interpreted(struct target *target,
 		uint32_t cp15_opcode, uint32_t address, uint32_t *value)
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
@@ -253,7 +253,7 @@ static int arm920t_read_cp15_interpreted(target_t *target,
 }
 
 static
-int arm920t_write_cp15_interpreted(target_t *target,
+int arm920t_write_cp15_interpreted(struct target *target,
 		uint32_t cp15_opcode, uint32_t value, uint32_t address)
 {
 	uint32_t cp15c15 = 0x0;
@@ -293,7 +293,7 @@ int arm920t_write_cp15_interpreted(target_t *target,
 }
 
 // EXPORTED to FA256
-uint32_t arm920t_get_ttb(target_t *target)
+uint32_t arm920t_get_ttb(struct target *target)
 {
 	int retval;
 	uint32_t ttb = 0x0;
@@ -305,7 +305,7 @@ uint32_t arm920t_get_ttb(target_t *target)
 }
 
 // EXPORTED to FA256
-void arm920t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache)
+void arm920t_disable_mmu_caches(struct target *target, int mmu, int d_u_cache, int i_cache)
 {
 	uint32_t cp15_control;
 
@@ -326,7 +326,7 @@ void arm920t_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_
 }
 
 // EXPORTED to FA256
-void arm920t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache)
+void arm920t_enable_mmu_caches(struct target *target, int mmu, int d_u_cache, int i_cache)
 {
 	uint32_t cp15_control;
 
@@ -347,7 +347,7 @@ void arm920t_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_c
 }
 
 // EXPORTED to FA256
-void arm920t_post_debug_entry(target_t *target)
+void arm920t_post_debug_entry(struct target *target)
 {
 	uint32_t cp15c15;
 	struct arm920t_common *arm920t = target_to_arm920(target);
@@ -391,7 +391,7 @@ void arm920t_post_debug_entry(target_t *target)
 }
 
 // EXPORTED to FA256
-void arm920t_pre_restore_context(target_t *target)
+void arm920t_pre_restore_context(struct target *target)
 {
 	uint32_t cp15c15;
 	struct arm920t_common *arm920t = target_to_arm920(target);
@@ -427,7 +427,7 @@ static int arm920t_verify_pointer(struct command_context_s *cmd_ctx,
 }
 
 /** Logs summary of ARM920 state for a halted target. */
-int arm920t_arch_state(struct target_s *target)
+int arm920t_arch_state(struct target *target)
 {
 	static const char *state[] =
 	{
@@ -460,7 +460,7 @@ int arm920t_arch_state(struct target_s *target)
 	return ERROR_OK;
 }
 
-static int arm920_mmu(struct target_s *target, int *enabled)
+static int arm920_mmu(struct target *target, int *enabled)
 {
 	if (target->state != TARGET_HALTED) {
 		LOG_ERROR("%s: target not halted", __func__);
@@ -471,7 +471,7 @@ static int arm920_mmu(struct target_s *target, int *enabled)
 	return ERROR_OK;
 }
 
-static int arm920_virt2phys(struct target_s *target,
+static int arm920_virt2phys(struct target *target,
 		uint32_t virt, uint32_t *phys)
 {
 	/** @todo Implement this!  */
@@ -480,7 +480,7 @@ static int arm920_virt2phys(struct target_s *target,
 }
 
 /** Reads a buffer, in the specified word size, with current MMU settings. */
-int arm920t_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int arm920t_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	int retval;
 
@@ -490,7 +490,7 @@ int arm920t_read_memory(struct target_s *target, uint32_t address, uint32_t size
 }
 
 
-static int arm920t_read_phys_memory(struct target_s *target,
+static int arm920t_read_phys_memory(struct target *target,
 		uint32_t address, uint32_t size,
 		uint32_t count, uint8_t *buffer)
 {
@@ -500,7 +500,7 @@ static int arm920t_read_phys_memory(struct target_s *target,
 			address, size, count, buffer);
 }
 
-static int arm920t_write_phys_memory(struct target_s *target,
+static int arm920t_write_phys_memory(struct target *target,
 		uint32_t address, uint32_t size,
 		uint32_t count, uint8_t *buffer)
 {
@@ -512,7 +512,7 @@ static int arm920t_write_phys_memory(struct target_s *target,
 
 
 /** Writes a buffer, in the specified word size, with current MMU settings. */
-int arm920t_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int arm920t_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	int retval;
 
@@ -549,7 +549,7 @@ int arm920t_write_memory(struct target_s *target, uint32_t address, uint32_t siz
 }
 
 // EXPORTED to FA256
-int arm920t_soft_reset_halt(struct target_s *target)
+int arm920t_soft_reset_halt(struct target *target)
 {
 	int retval = ERROR_OK;
 	struct arm920t_common *arm920t = target_to_arm920(target);
@@ -620,7 +620,7 @@ int arm920t_soft_reset_halt(struct target_s *target)
 	return ERROR_OK;
 }
 
-int arm920t_init_arch_info(target_t *target, struct arm920t_common *arm920t, struct jtag_tap *tap)
+int arm920t_init_arch_info(struct target *target, struct arm920t_common *arm920t, struct jtag_tap *tap)
 {
 	struct arm9tdmi_common *arm9tdmi = &arm920t->arm9tdmi_common;
 	struct arm7_9_common *arm7_9 = &arm9tdmi->arm7_9_common;
@@ -655,7 +655,7 @@ int arm920t_init_arch_info(target_t *target, struct arm920t_common *arm920t, str
 	return ERROR_OK;
 }
 
-static int arm920t_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm920t_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm920t_common *arm920t = calloc(1,sizeof(struct arm920t_common));
 
@@ -665,7 +665,7 @@ static int arm920t_target_create(struct target_s *target, Jim_Interp *interp)
 COMMAND_HANDLER(arm920t_handle_read_cache_command)
 {
 	int retval = ERROR_OK;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm920t_common *arm920t = target_to_arm920(target);
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -911,7 +911,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
 COMMAND_HANDLER(arm920t_handle_read_mmu_command)
 {
 	int retval = ERROR_OK;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm920t_common *arm920t = target_to_arm920(target);
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
@@ -1194,7 +1194,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
 COMMAND_HANDLER(arm920t_handle_cp15_command)
 {
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm920t_common *arm920t = target_to_arm920(target);
 
 	retval = arm920t_verify_pointer(cmd_ctx, arm920t);
@@ -1247,7 +1247,7 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
 COMMAND_HANDLER(arm920t_handle_cp15i_command)
 {
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm920t_common *arm920t = target_to_arm920(target);
 
 	retval = arm920t_verify_pointer(cmd_ctx, arm920t);
@@ -1314,7 +1314,7 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command)
 COMMAND_HANDLER(arm920t_handle_cache_info_command)
 {
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm920t_common *arm920t = target_to_arm920(target);
 
 	retval = arm920t_verify_pointer(cmd_ctx, arm920t);
@@ -1325,7 +1325,7 @@ COMMAND_HANDLER(arm920t_handle_cache_info_command)
 }
 
 
-static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int arm920t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	if (cpnum!=15)
 	{
@@ -1336,7 +1336,7 @@ static int arm920t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2,
 	return arm920t_read_cp15_interpreted(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), 0, value);
 }
 
-static int arm920t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int arm920t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	if (cpnum!=15)
 	{
diff --git a/src/target/arm920t.h b/src/target/arm920t.h
index 4bd5cebb..02f6da5c 100644
--- a/src/target/arm920t.h
+++ b/src/target/arm920t.h
@@ -39,7 +39,7 @@ struct arm920t_common
 };
 
 static inline struct arm920t_common *
-target_to_arm920(struct target_s *target)
+target_to_arm920(struct target *target)
 {
 	return container_of(target->arch_info, struct arm920t_common,
 			arm9tdmi_common.arm7_9_common.armv4_5_common);
@@ -58,18 +58,18 @@ struct arm920t_tlb_entry
 	uint32_t ram2;
 };
 
-int arm920t_arch_state(struct target_s *target);
-int arm920t_soft_reset_halt(struct target_s *target);
-int arm920t_read_memory(struct target_s *target,
+int arm920t_arch_state(struct target *target);
+int arm920t_soft_reset_halt(struct target *target);
+int arm920t_read_memory(struct target *target,
 	uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm920t_write_memory(struct target_s *target,
+int arm920t_write_memory(struct target *target,
 	uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-void arm920t_post_debug_entry(target_t *target);
-void arm920t_pre_restore_context(target_t *target);
-	uint32_t arm920t_get_ttb(target_t *target);
-void arm920t_disable_mmu_caches(target_t *target,
+void arm920t_post_debug_entry(struct target *target);
+void arm920t_pre_restore_context(struct target *target);
+	uint32_t arm920t_get_ttb(struct target *target);
+void arm920t_disable_mmu_caches(struct target *target,
 	int mmu, int d_u_cache, int i_cache);
-void arm920t_enable_mmu_caches(target_t *target,
+void arm920t_enable_mmu_caches(struct target *target,
 	int mmu, int d_u_cache, int i_cache);
 int arm920t_register_commands(struct command_context_s *cmd_ctx);
 
diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index 7d37590f..b2f246f9 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -47,7 +47,7 @@
 
 #define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, CRn, CRm) ((opcode_1 << 11) | (opcode_2 << 8) | (CRn << 4) | (CRm << 0))
 
-static int arm926ejs_cp15_read(target_t *target, uint32_t op1, uint32_t op2,
+static int arm926ejs_cp15_read(struct target *target, uint32_t op1, uint32_t op2,
 		uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	int retval = ERROR_OK;
@@ -129,7 +129,7 @@ static int arm926ejs_cp15_read(target_t *target, uint32_t op1, uint32_t op2,
 	return ERROR_OK;
 }
 
-static int arm926ejs_mrc(target_t *target, int cpnum, uint32_t op1,
+static int arm926ejs_mrc(struct target *target, int cpnum, uint32_t op1,
 		uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	if (cpnum != 15) {
@@ -139,7 +139,7 @@ static int arm926ejs_mrc(target_t *target, int cpnum, uint32_t op1,
 	return arm926ejs_cp15_read(target, op1, op2, CRn, CRm, value);
 }
 
-static int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2,
+static int arm926ejs_cp15_write(struct target *target, uint32_t op1, uint32_t op2,
 		uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	int retval = ERROR_OK;
@@ -219,7 +219,7 @@ static int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2,
 	return ERROR_OK;
 }
 
-static int arm926ejs_mcr(target_t *target, int cpnum, uint32_t op1,
+static int arm926ejs_mcr(struct target *target, int cpnum, uint32_t op1,
 		uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	if (cpnum != 15) {
@@ -229,7 +229,7 @@ static int arm926ejs_mcr(target_t *target, int cpnum, uint32_t op1,
 	return arm926ejs_cp15_write(target, op1, op2, CRn, CRm, value);
 }
 
-static int arm926ejs_examine_debug_reason(target_t *target)
+static int arm926ejs_examine_debug_reason(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
@@ -332,7 +332,7 @@ static int arm926ejs_examine_debug_reason(target_t *target)
 	return ERROR_OK;
 }
 
-static uint32_t arm926ejs_get_ttb(target_t *target)
+static uint32_t arm926ejs_get_ttb(struct target *target)
 {
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 	int retval;
@@ -344,7 +344,7 @@ static uint32_t arm926ejs_get_ttb(target_t *target)
 	return ttb;
 }
 
-static void arm926ejs_disable_mmu_caches(target_t *target, int mmu,
+static void arm926ejs_disable_mmu_caches(struct target *target, int mmu,
 		int d_u_cache, int i_cache)
 {
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
@@ -393,7 +393,7 @@ static void arm926ejs_disable_mmu_caches(target_t *target, int mmu,
 	arm926ejs->write_cp15(target, 0, 0, 1, 0, cp15_control);
 }
 
-static void arm926ejs_enable_mmu_caches(target_t *target, int mmu,
+static void arm926ejs_enable_mmu_caches(struct target *target, int mmu,
 		int d_u_cache, int i_cache)
 {
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
@@ -415,7 +415,7 @@ static void arm926ejs_enable_mmu_caches(target_t *target, int mmu,
 	arm926ejs->write_cp15(target, 0, 0, 1, 0, cp15_control);
 }
 
-static void arm926ejs_post_debug_entry(target_t *target)
+static void arm926ejs_post_debug_entry(struct target *target)
 {
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 
@@ -454,7 +454,7 @@ static void arm926ejs_post_debug_entry(target_t *target)
 	arm926ejs->write_cp15(target, 7, 0, 15, 0, cache_dbg_ctrl);
 }
 
-static void arm926ejs_pre_restore_context(target_t *target)
+static void arm926ejs_pre_restore_context(struct target *target)
 {
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 
@@ -485,7 +485,7 @@ static int arm926ejs_verify_pointer(struct command_context_s *cmd_ctx,
 }
 
 /** Logs summary of ARM926 state for a halted target. */
-int arm926ejs_arch_state(struct target_s *target)
+int arm926ejs_arch_state(struct target *target)
 {
 	static const char *state[] =
 	{
@@ -518,7 +518,7 @@ int arm926ejs_arch_state(struct target_s *target)
 	return ERROR_OK;
 }
 
-int arm926ejs_soft_reset_halt(struct target_s *target)
+int arm926ejs_soft_reset_halt(struct target *target)
 {
 	int retval = ERROR_OK;
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
@@ -585,7 +585,7 @@ int arm926ejs_soft_reset_halt(struct target_s *target)
 }
 
 /** Writes a buffer, in the specified word size, with current MMU settings. */
-int arm926ejs_write_memory(struct target_s *target, uint32_t address,
+int arm926ejs_write_memory(struct target *target, uint32_t address,
 		uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	int retval;
@@ -646,7 +646,7 @@ int arm926ejs_write_memory(struct target_s *target, uint32_t address,
 	return retval;
 }
 
-static int arm926ejs_write_phys_memory(struct target_s *target,
+static int arm926ejs_write_phys_memory(struct target *target,
 		uint32_t address, uint32_t size,
 		uint32_t count, uint8_t *buffer)
 {
@@ -656,7 +656,7 @@ static int arm926ejs_write_phys_memory(struct target_s *target,
 			address, size, count, buffer);
 }
 
-static int arm926ejs_read_phys_memory(struct target_s *target,
+static int arm926ejs_read_phys_memory(struct target *target,
 		uint32_t address, uint32_t size,
 		uint32_t count, uint8_t *buffer)
 {
@@ -666,7 +666,7 @@ static int arm926ejs_read_phys_memory(struct target_s *target,
 			address, size, count, buffer);
 }
 
-int arm926ejs_init_arch_info(target_t *target, struct arm926ejs_common *arm926ejs,
+int arm926ejs_init_arch_info(struct target *target, struct arm926ejs_common *arm926ejs,
 		struct jtag_tap *tap)
 {
 	struct arm9tdmi_common *arm9tdmi = &arm926ejs->arm9tdmi_common;
@@ -703,7 +703,7 @@ int arm926ejs_init_arch_info(target_t *target, struct arm926ejs_common *arm926ej
 	return ERROR_OK;
 }
 
-static int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm926ejs_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm926ejs_common *arm926ejs = calloc(1,sizeof(struct arm926ejs_common));
 
@@ -716,7 +716,7 @@ static int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp)
 COMMAND_HANDLER(arm926ejs_handle_cp15_command)
 {
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 	int opcode_1;
 	int opcode_2;
@@ -777,7 +777,7 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command)
 COMMAND_HANDLER(arm926ejs_handle_cache_info_command)
 {
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 
 	retval = arm926ejs_verify_pointer(cmd_ctx, arm926ejs);
@@ -787,7 +787,7 @@ COMMAND_HANDLER(arm926ejs_handle_cache_info_command)
 	return armv4_5_handle_cache_info_command(cmd_ctx, &arm926ejs->armv4_5_mmu.armv4_5_cache);
 }
 
-static int arm926ejs_virt2phys(struct target_s *target, uint32_t virtual, uint32_t *physical)
+static int arm926ejs_virt2phys(struct target *target, uint32_t virtual, uint32_t *physical)
 {
 	int type;
 	uint32_t cb;
@@ -804,7 +804,7 @@ static int arm926ejs_virt2phys(struct target_s *target, uint32_t virtual, uint32
 	return ERROR_OK;
 }
 
-static int arm926ejs_mmu(struct target_s *target, int *enabled)
+static int arm926ejs_mmu(struct target *target, int *enabled)
 {
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 
diff --git a/src/target/arm926ejs.h b/src/target/arm926ejs.h
index 171c5890..e6c46dc0 100644
--- a/src/target/arm926ejs.h
+++ b/src/target/arm926ejs.h
@@ -30,8 +30,8 @@ struct arm926ejs_common
 	struct arm9tdmi_common arm9tdmi_common;
 	uint32_t common_magic;
 	struct armv4_5_mmu_common armv4_5_mmu;
-	int (*read_cp15)(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
-	int (*write_cp15)(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
+	int (*read_cp15)(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
+	int (*write_cp15)(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
 	uint32_t cp15_control_reg;
 	uint32_t d_fsr;
 	uint32_t i_fsr;
@@ -39,19 +39,19 @@ struct arm926ejs_common
 };
 
 static inline struct arm926ejs_common *
-target_to_arm926(struct target_s *target)
+target_to_arm926(struct target *target)
 {
 	return container_of(target->arch_info, struct arm926ejs_common,
 		arm9tdmi_common.arm7_9_common.armv4_5_common);
 }
 
 
-int arm926ejs_init_arch_info(target_t *target,
+int arm926ejs_init_arch_info(struct target *target,
 		struct arm926ejs_common *arm926ejs, struct jtag_tap *tap);
 int arm926ejs_register_commands(struct command_context_s *cmd_ctx);
-int arm926ejs_arch_state(struct target_s *target);
-int arm926ejs_write_memory(struct target_s *target,
+int arm926ejs_arch_state(struct target *target);
+int arm926ejs_write_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm926ejs_soft_reset_halt(struct target_s *target);
+int arm926ejs_soft_reset_halt(struct target *target);
 
 #endif /* ARM926EJS_H */
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index 7c46f0fd..b1ae48c3 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -32,7 +32,7 @@
 #define _DEBUG_INSTRUCTION_EXECUTION_
 #endif
 
-int arm966e_init_arch_info(target_t *target, struct arm966e_common *arm966e, struct jtag_tap *tap)
+int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e, struct jtag_tap *tap)
 {
 	struct arm9tdmi_common *arm9tdmi = &arm966e->arm9tdmi_common;
 	struct arm7_9_common *arm7_9 = &arm9tdmi->arm7_9_common;
@@ -50,7 +50,7 @@ int arm966e_init_arch_info(target_t *target, struct arm966e_common *arm966e, str
 	return ERROR_OK;
 }
 
-static int arm966e_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm966e_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm966e_common *arm966e = calloc(1,sizeof(struct arm966e_common));
 
@@ -67,7 +67,7 @@ static int arm966e_verify_pointer(struct command_context_s *cmd_ctx,
 	return ERROR_OK;
 }
 
-static int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value)
+static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -119,7 +119,7 @@ static int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value)
 }
 
 // EXPORTED to str9x (flash)
-int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value)
+int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -165,7 +165,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value)
 COMMAND_HANDLER(arm966e_handle_cp15_command)
 {
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm966e_common *arm966e = target_to_arm966(target);
 
 	retval = arm966e_verify_pointer(cmd_ctx, arm966e);
diff --git a/src/target/arm966e.h b/src/target/arm966e.h
index e6155b5c..74e1a030 100644
--- a/src/target/arm966e.h
+++ b/src/target/arm966e.h
@@ -35,15 +35,15 @@ struct arm966e_common
 };
 
 static inline struct arm966e_common *
-target_to_arm966(struct target_s *target)
+target_to_arm966(struct target *target)
 {
 	return container_of(target->arch_info, struct arm966e_common,
 			arm9tdmi_common.arm7_9_common.armv4_5_common);
 }
 
-int arm966e_init_arch_info(target_t *target,
+int arm966e_init_arch_info(struct target *target,
 		struct arm966e_common *arm966e, struct jtag_tap *tap);
 int arm966e_register_commands(struct command_context_s *cmd_ctx);
-int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value);
+int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value);
 
 #endif /* ARM966E_H */
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 0c390dfb..5425582d 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -57,7 +57,7 @@ static const struct arm9tdmi_vector arm9tdmi_vectors[] =
 	{0, 0},
 };
 
-int arm9tdmi_examine_debug_reason(target_t *target)
+int arm9tdmi_examine_debug_reason(struct target *target)
 {
 	int retval = ERROR_OK;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -325,7 +325,7 @@ int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
 	return ERROR_OK;
 }
 
-static void arm9tdmi_change_to_arm(target_t *target,
+static void arm9tdmi_change_to_arm(struct target *target,
 		uint32_t *r0, uint32_t *pc)
 {
 	int retval = ERROR_OK;
@@ -379,7 +379,7 @@ static void arm9tdmi_change_to_arm(target_t *target,
 	*pc -= 0xc;
 }
 
-void arm9tdmi_read_core_regs(target_t *target,
+void arm9tdmi_read_core_regs(struct target *target,
 		uint32_t mask, uint32_t* core_regs[16])
 {
 	int i;
@@ -404,7 +404,7 @@ void arm9tdmi_read_core_regs(target_t *target,
 	}
 }
 
-static void arm9tdmi_read_core_regs_target_buffer(target_t *target,
+static void arm9tdmi_read_core_regs_target_buffer(struct target *target,
 		uint32_t mask, void* buffer, int size)
 {
 	int i;
@@ -444,7 +444,7 @@ static void arm9tdmi_read_core_regs_target_buffer(target_t *target,
 	}
 }
 
-static void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+static void arm9tdmi_read_xpsr(struct target *target, uint32_t *xpsr, int spsr)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -466,7 +466,7 @@ static void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0);
 }
 
-static void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+static void arm9tdmi_write_xpsr(struct target *target, uint32_t xpsr, int spsr)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -500,7 +500,7 @@ static void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-static void arm9tdmi_write_xpsr_im8(target_t *target,
+static void arm9tdmi_write_xpsr_im8(struct target *target,
 		uint8_t xpsr_im, int rot, int spsr)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -525,7 +525,7 @@ static void arm9tdmi_write_xpsr_im8(target_t *target,
 	}
 }
 
-void arm9tdmi_write_core_regs(target_t *target,
+void arm9tdmi_write_core_regs(struct target *target,
 		uint32_t mask, uint32_t core_regs[16])
 {
 	int i;
@@ -551,7 +551,7 @@ void arm9tdmi_write_core_regs(target_t *target,
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_load_word_regs(target_t *target, uint32_t mask)
+void arm9tdmi_load_word_regs(struct target *target, uint32_t mask)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -561,7 +561,7 @@ void arm9tdmi_load_word_regs(target_t *target, uint32_t mask)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_load_hword_reg(target_t *target, int num)
+void arm9tdmi_load_hword_reg(struct target *target, int num)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -571,7 +571,7 @@ void arm9tdmi_load_hword_reg(target_t *target, int num)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_load_byte_reg(target_t *target, int num)
+void arm9tdmi_load_byte_reg(struct target *target, int num)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -581,7 +581,7 @@ void arm9tdmi_load_byte_reg(target_t *target, int num)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_store_word_regs(target_t *target, uint32_t mask)
+void arm9tdmi_store_word_regs(struct target *target, uint32_t mask)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -591,7 +591,7 @@ void arm9tdmi_store_word_regs(target_t *target, uint32_t mask)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_store_hword_reg(target_t *target, int num)
+void arm9tdmi_store_hword_reg(struct target *target, int num)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -601,7 +601,7 @@ void arm9tdmi_store_hword_reg(target_t *target, int num)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_store_byte_reg(target_t *target, int num)
+void arm9tdmi_store_byte_reg(struct target *target, int num)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -611,7 +611,7 @@ void arm9tdmi_store_byte_reg(target_t *target, int num)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-static void arm9tdmi_write_pc(target_t *target, uint32_t pc)
+static void arm9tdmi_write_pc(struct target *target, uint32_t pc)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -635,7 +635,7 @@ static void arm9tdmi_write_pc(target_t *target, uint32_t pc)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_branch_resume(target_t *target)
+void arm9tdmi_branch_resume(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -644,7 +644,7 @@ void arm9tdmi_branch_resume(target_t *target)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-static void arm9tdmi_branch_resume_thumb(target_t *target)
+static void arm9tdmi_branch_resume_thumb(struct target *target)
 {
 	LOG_DEBUG("-");
 
@@ -703,7 +703,7 @@ static void arm9tdmi_branch_resume_thumb(target_t *target)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc)
+void arm9tdmi_enable_single_step(struct target *target, uint32_t next_pc)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
@@ -718,7 +718,7 @@ void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc)
 	}
 }
 
-void arm9tdmi_disable_single_step(target_t *target)
+void arm9tdmi_disable_single_step(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
@@ -733,7 +733,7 @@ void arm9tdmi_disable_single_step(target_t *target)
 	}
 }
 
-static void arm9tdmi_build_reg_cache(target_t *target)
+static void arm9tdmi_build_reg_cache(struct target *target)
 {
 	struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
@@ -742,7 +742,7 @@ static void arm9tdmi_build_reg_cache(target_t *target)
 	armv4_5->core_cache = (*cache_p);
 }
 
-int arm9tdmi_examine(struct target_s *target)
+int arm9tdmi_examine(struct target *target)
 {
 	int retval;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -780,13 +780,13 @@ int arm9tdmi_examine(struct target_s *target)
 }
 
 int arm9tdmi_init_target(struct command_context_s *cmd_ctx,
-		struct target_s *target)
+		struct target *target)
 {
 	arm9tdmi_build_reg_cache(target);
 	return ERROR_OK;
 }
 
-int arm9tdmi_init_arch_info(target_t *target, struct arm9tdmi_common *arm9tdmi, struct jtag_tap *tap)
+int arm9tdmi_init_arch_info(struct target *target, struct arm9tdmi_common *arm9tdmi, struct jtag_tap *tap)
 {
 	struct arm *armv4_5;
 	struct arm7_9_common *arm7_9;
@@ -846,7 +846,7 @@ int arm9tdmi_init_arch_info(target_t *target, struct arm9tdmi_common *arm9tdmi,
 	return ERROR_OK;
 }
 
-static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm9tdmi_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm9tdmi_common *arm9tdmi = calloc(1,sizeof(struct arm9tdmi_common));
 
@@ -858,7 +858,7 @@ static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp)
 
 COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct reg *vector_catch;
 	uint32_t vector_catch_value;
diff --git a/src/target/arm9tdmi.h b/src/target/arm9tdmi.h
index 2e25b52c..5165dc88 100644
--- a/src/target/arm9tdmi.h
+++ b/src/target/arm9tdmi.h
@@ -52,9 +52,9 @@ enum arm9tdmi_vector_bit
 };
 
 int arm9tdmi_init_target(struct command_context_s *cmd_ctx,
-		struct target_s *target);
-int arm9tdmi_examine(struct target_s *target);
-int arm9tdmi_init_arch_info(target_t *target,
+		struct target *target);
+int arm9tdmi_examine(struct target *target);
+int arm9tdmi_init_arch_info(struct target *target,
 		struct arm9tdmi_common *arm9tdmi, struct jtag_tap *tap);
 int arm9tdmi_register_commands(struct command_context_s *cmd_ctx);
 
@@ -63,22 +63,22 @@ int arm9tdmi_clock_out(struct arm_jtag *jtag_info,
 int arm9tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in);
 int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
 		void *in, int size, int be);
-void arm9tdmi_read_core_regs(target_t *target,
+void arm9tdmi_read_core_regs(struct target *target,
 		uint32_t mask, uint32_t* core_regs[16]);
-void arm9tdmi_write_core_regs(target_t *target,
+void arm9tdmi_write_core_regs(struct target *target,
 		uint32_t mask, uint32_t core_regs[16]);
 
-int arm9tdmi_examine_debug_reason(target_t *target);
+int arm9tdmi_examine_debug_reason(struct target *target);
 
-void arm9tdmi_load_word_regs(target_t *target, uint32_t mask);
-void arm9tdmi_load_hword_reg(target_t *target, int num);
-void arm9tdmi_load_byte_reg(target_t *target, int num);
-void arm9tdmi_store_word_regs(target_t *target, uint32_t mask);
-void arm9tdmi_store_hword_reg(target_t *target, int num);
-void arm9tdmi_store_byte_reg(target_t *target, int num);
+void arm9tdmi_load_word_regs(struct target *target, uint32_t mask);
+void arm9tdmi_load_hword_reg(struct target *target, int num);
+void arm9tdmi_load_byte_reg(struct target *target, int num);
+void arm9tdmi_store_word_regs(struct target *target, uint32_t mask);
+void arm9tdmi_store_hword_reg(struct target *target, int num);
+void arm9tdmi_store_byte_reg(struct target *target, int num);
 
-void arm9tdmi_branch_resume(target_t *target);
-void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc);
-void arm9tdmi_disable_single_step(target_t *target);
+void arm9tdmi_branch_resume(struct target *target);
+void arm9tdmi_enable_single_step(struct target *target, uint32_t next_pc);
+void arm9tdmi_disable_single_step(struct target *target);
 
 #endif /* ARM9TDMI_H */
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index ce338859..35c35203 100644
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -4191,7 +4191,7 @@ ldrh_literal:
  * always set.  That means eventual arm_simulate_step() support for Thumb2
  * will need work in this area.
  */
-int thumb2_opcode(target_t *target, uint32_t address, struct arm_instruction *instruction)
+int thumb2_opcode(struct target *target, uint32_t address, struct arm_instruction *instruction)
 {
 	int retval;
 	uint16_t op;
diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h
index a3d16f5f..774dd2c2 100644
--- a/src/target/arm_disassembler.h
+++ b/src/target/arm_disassembler.h
@@ -201,7 +201,7 @@ int arm_evaluate_opcode(uint32_t opcode, uint32_t address,
 		struct arm_instruction *instruction);
 int thumb_evaluate_opcode(uint16_t opcode, uint32_t address,
 		struct arm_instruction *instruction);
-int thumb2_opcode(target_t *target, uint32_t address,
+int thumb2_opcode(struct target *target, uint32_t address,
 		struct arm_instruction *instruction);
 int arm_access_size(struct arm_instruction *instruction);
 
diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c
index 52526667..46cd5587 100644
--- a/src/target/arm_simulator.c
+++ b/src/target/arm_simulator.c
@@ -277,7 +277,7 @@ static int thumb_pass_branch_condition(uint32_t cpsr, uint16_t opcode)
  * if the dry_run_pc argument is provided, no state is changed,
  * but the new pc is stored in the variable pointed at by the argument
  */
-int arm_simulate_step_core(target_t *target,
+int arm_simulate_step_core(struct target *target,
 		uint32_t *dry_run_pc, struct arm_sim_interface *sim)
 {
 	uint32_t current_pc = sim->get_reg(sim, 15);
@@ -847,7 +847,7 @@ static enum armv4_5_mode armv4_5_get_mode(struct arm_sim_interface *sim)
 
 
 
-int arm_simulate_step(target_t *target, uint32_t *dry_run_pc)
+int arm_simulate_step(struct target *target, uint32_t *dry_run_pc)
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 	struct arm_sim_interface sim;
diff --git a/src/target/arm_simulator.h b/src/target/arm_simulator.h
index 9e7b0400..616627a4 100644
--- a/src/target/arm_simulator.h
+++ b/src/target/arm_simulator.h
@@ -22,7 +22,7 @@
 
 #include "types.h"
 
-struct target_s;
+struct target;
 
 struct arm_sim_interface
 {
@@ -38,10 +38,10 @@ struct arm_sim_interface
 };
 
 /* armv4_5 version */
-int arm_simulate_step(struct target_s *target, uint32_t *dry_run_pc);
+int arm_simulate_step(struct target *target, uint32_t *dry_run_pc);
 
 /* a generic arm simulator. Caller must implement the sim interface */
-int arm_simulate_step_core(target_t *target,
+int arm_simulate_step_core(struct target *target,
 		uint32_t *dry_run_pc, struct arm_sim_interface *sim);
 
 #endif /* ARM_SIMULATOR_H */
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 02105e5f..097e6e73 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -171,7 +171,7 @@ int armv4_5_get_core_reg(struct reg *reg)
 {
 	int retval;
 	struct armv4_5_core_reg *armv4_5 = reg->arch_info;
-	target_t *target = armv4_5->target;
+	struct target *target = armv4_5->target;
 
 	if (target->state != TARGET_HALTED)
 	{
@@ -188,7 +188,7 @@ int armv4_5_get_core_reg(struct reg *reg)
 int armv4_5_set_core_reg(struct reg *reg, uint8_t *buf)
 {
 	struct armv4_5_core_reg *armv4_5 = reg->arch_info;
-	target_t *target = armv4_5->target;
+	struct target *target = armv4_5->target;
 	struct armv4_5_common_s *armv4_5_target = target_to_armv4_5(target);
 	uint32_t value = buf_get_u32(buf, 0, 32);
 
@@ -235,7 +235,7 @@ int armv4_5_set_core_reg(struct reg *reg, uint8_t *buf)
 	return ERROR_OK;
 }
 
-int armv4_5_invalidate_core_regs(target_t *target)
+int armv4_5_invalidate_core_regs(struct target *target)
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 	int i;
@@ -249,7 +249,7 @@ int armv4_5_invalidate_core_regs(target_t *target)
 	return ERROR_OK;
 }
 
-struct reg_cache* armv4_5_build_reg_cache(target_t *target, struct arm *armv4_5_common)
+struct reg_cache* armv4_5_build_reg_cache(struct target *target, struct arm *armv4_5_common)
 {
 	int num_regs = 37;
 	struct reg_cache *cache = malloc(sizeof(struct reg_cache));
@@ -287,7 +287,7 @@ struct reg_cache* armv4_5_build_reg_cache(target_t *target, struct arm *armv4_5_
 	return cache;
 }
 
-int armv4_5_arch_state(struct target_s *target)
+int armv4_5_arch_state(struct target *target)
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 
@@ -312,7 +312,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
 	char output[128];
 	int output_len;
 	int mode, num;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 
 	if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
@@ -361,7 +361,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
 
 COMMAND_HANDLER(handle_armv4_5_core_state_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 
 	if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
@@ -390,7 +390,7 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command)
 COMMAND_HANDLER(handle_armv4_5_disassemble_command)
 {
 	int retval = ERROR_OK;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 	uint32_t address;
 	int count = 1;
@@ -483,7 +483,7 @@ int armv4_5_register_commands(struct command_context_s *cmd_ctx)
 	return ERROR_OK;
 }
 
-int armv4_5_get_gdb_reg_list(target_t *target, struct reg **reg_list[], int *reg_list_size)
+int armv4_5_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size)
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 	int i;
@@ -511,7 +511,7 @@ int armv4_5_get_gdb_reg_list(target_t *target, struct reg **reg_list[], int *reg
 }
 
 /* wait for execution to complete and check exit point */
-static int armv4_5_run_algorithm_completion(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info)
+static int armv4_5_run_algorithm_completion(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info)
 {
 	int retval;
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
@@ -543,7 +543,7 @@ static int armv4_5_run_algorithm_completion(struct target_s *target, uint32_t ex
 	return ERROR_OK;
 }
 
-int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info))
+int armv4_5_run_algorithm_inner(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info))
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 	struct armv4_5_algorithm *armv4_5_algorithm_info = arch_info;
@@ -708,12 +708,12 @@ int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, str
 	return retval;
 }
 
-int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
+int armv4_5_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
 {
 	return armv4_5_run_algorithm_inner(target, num_mem_params, mem_params, num_reg_params, reg_params, entry_point, exit_point, timeout_ms, arch_info, armv4_5_run_algorithm_completion);
 }
 
-int armv4_5_init_arch_info(target_t *target, struct arm *armv4_5)
+int armv4_5_init_arch_info(struct target *target, struct arm *armv4_5)
 {
 	target->arch_info = armv4_5;
 
diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index 16fb85df..472c2c1b 100644
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -98,10 +98,10 @@ struct arm
 	/** Handle for the Embedded Trace Module, if one is present. */
 	struct etm_context *etm;
 
-	int (*full_context)(struct target_s *target);
-	int (*read_core_reg)(struct target_s *target,
+	int (*full_context)(struct target *target);
+	int (*read_core_reg)(struct target *target,
 			int num, enum armv4_5_mode mode);
-	int (*write_core_reg)(struct target_s *target,
+	int (*write_core_reg)(struct target *target,
 			int num, enum armv4_5_mode mode, uint32_t value);
 	void *arch_info;
 };
@@ -109,7 +109,7 @@ struct arm
 #define target_to_armv4_5 target_to_arm
 
 /** Convert target handle to generic ARM target state handle. */
-static inline struct arm *target_to_arm(struct target_s *target)
+static inline struct arm *target_to_arm(struct target *target)
 {
 	return target->arch_info;
 }
@@ -131,11 +131,11 @@ struct armv4_5_core_reg
 {
 	int num;
 	enum armv4_5_mode mode;
-	target_t *target;
+	struct target *target;
 	struct arm *armv4_5_common;
 };
 
-struct reg_cache* armv4_5_build_reg_cache(target_t *target,
+struct reg_cache* armv4_5_build_reg_cache(struct target *target,
 		struct arm *armv4_5_common);
 
 /* map psr mode bits to linear number */
@@ -175,20 +175,20 @@ static __inline enum armv4_5_mode armv4_5_number_to_mode(int number)
 	}
 };
 
-int armv4_5_arch_state(struct target_s *target);
-int armv4_5_get_gdb_reg_list(target_t *target,
+int armv4_5_arch_state(struct target *target);
+int armv4_5_get_gdb_reg_list(struct target *target,
 		struct reg **reg_list[], int *reg_list_size);
 
 int armv4_5_register_commands(struct command_context_s *cmd_ctx);
-int armv4_5_init_arch_info(target_t *target, struct arm *armv4_5);
+int armv4_5_init_arch_info(struct target *target, struct arm *armv4_5);
 
-int armv4_5_run_algorithm(struct target_s *target,
+int armv4_5_run_algorithm(struct target *target,
 		int num_mem_params, struct mem_param *mem_params,
 		int num_reg_params, struct reg_param *reg_params,
 		uint32_t entry_point, uint32_t exit_point,
 		int timeout_ms, void *arch_info);
 
-int armv4_5_invalidate_core_regs(target_t *target);
+int armv4_5_invalidate_core_regs(struct target *target);
 
 /* ARM mode instructions
  */
diff --git a/src/target/armv4_5_mmu.c b/src/target/armv4_5_mmu.c
index 64147e87..d84da482 100644
--- a/src/target/armv4_5_mmu.c
+++ b/src/target/armv4_5_mmu.c
@@ -25,14 +25,14 @@
 #include "armv4_5_mmu.h"
 
 
-uint32_t armv4mmu_translate_va(target_t *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type, uint32_t *cb, int *domain, uint32_t *ap);
+uint32_t armv4mmu_translate_va(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type, uint32_t *cb, int *domain, uint32_t *ap);
 
 char* armv4_5_mmu_page_type_names[] =
 {
 	"section", "large page", "small page", "tiny page"
 };
 
-uint32_t armv4_5_mmu_translate_va(target_t *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type, uint32_t *cb, int *domain, uint32_t *ap)
+uint32_t armv4_5_mmu_translate_va(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type, uint32_t *cb, int *domain, uint32_t *ap)
 {
 	uint32_t first_lvl_descriptor = 0x0;
 	uint32_t second_lvl_descriptor = 0x0;
@@ -130,7 +130,7 @@ uint32_t armv4_5_mmu_translate_va(target_t *target, struct armv4_5_mmu_common *a
 	return ERROR_TARGET_TRANSLATION_FAULT;
 }
 
-int armv4_5_mmu_read_physical(target_t *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int armv4_5_mmu_read_physical(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	int retval;
 
@@ -150,7 +150,7 @@ int armv4_5_mmu_read_physical(target_t *target, struct armv4_5_mmu_common *armv4
 	return retval;
 }
 
-int armv4_5_mmu_write_physical(target_t *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int armv4_5_mmu_write_physical(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	int retval;
 
diff --git a/src/target/armv4_5_mmu.h b/src/target/armv4_5_mmu.h
index 4357c92f..bbe50c6b 100644
--- a/src/target/armv4_5_mmu.h
+++ b/src/target/armv4_5_mmu.h
@@ -25,11 +25,11 @@
 
 struct armv4_5_mmu_common
 {
-	uint32_t (*get_ttb)(target_t *target);
-	int (*read_memory)(target_t *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-	int (*write_memory)(target_t *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-	void (*disable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
-	void (*enable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
+	uint32_t (*get_ttb)(struct target *target);
+	int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+	int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+	void (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
+	void (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
 	struct armv4_5_cache_common armv4_5_cache;
 	int has_tiny_pages;
 	int mmu_enabled;
@@ -42,15 +42,15 @@ enum
 
 extern char* armv4_5_page_type_names[];
 
-uint32_t armv4_5_mmu_translate_va(target_t *target,
+uint32_t armv4_5_mmu_translate_va(struct target *target,
 		struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type,
 		uint32_t *cb, int *domain, uint32_t *ap);
 
-int armv4_5_mmu_read_physical(target_t *target,
+int armv4_5_mmu_read_physical(struct target *target,
 		struct armv4_5_mmu_common *armv4_5_mmu,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 
-int armv4_5_mmu_write_physical(target_t *target,
+int armv4_5_mmu_write_physical(struct target *target,
 		struct armv4_5_mmu_common *armv4_5_mmu,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 
diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index ead5b9c2..9227219b 100644
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -173,7 +173,7 @@ struct reg armv7a_gdb_dummy_fp_reg =
 			0, 1, 96, NULL, 0, NULL, 0
 };
 
-void armv7a_show_fault_registers(target_t *target)
+void armv7a_show_fault_registers(struct target *target)
 {
 	uint32_t dfsr, ifsr, dfar, ifar;
 	struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -190,7 +190,7 @@ void armv7a_show_fault_registers(target_t *target)
 
 }
 
-int armv7a_arch_state(struct target_s *target)
+int armv7a_arch_state(struct target *target)
 {
 	static const char *state[] =
 	{
@@ -232,7 +232,7 @@ int armv7a_arch_state(struct target_s *target)
 
 COMMAND_HANDLER(handle_dap_baseaddr_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct swjdp_common *swjdp = &armv7a->swjdp_info;
 
@@ -241,7 +241,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command)
 
 COMMAND_HANDLER(handle_dap_memaccess_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct swjdp_common *swjdp = &armv7a->swjdp_info;
 
@@ -250,7 +250,7 @@ COMMAND_HANDLER(handle_dap_memaccess_command)
 
 COMMAND_HANDLER(handle_dap_apsel_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct swjdp_common *swjdp = &armv7a->swjdp_info;
 
@@ -259,7 +259,7 @@ COMMAND_HANDLER(handle_dap_apsel_command)
 
 COMMAND_HANDLER(handle_dap_apid_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct swjdp_common *swjdp = &armv7a->swjdp_info;
 
@@ -268,7 +268,7 @@ COMMAND_HANDLER(handle_dap_apid_command)
 
 COMMAND_HANDLER(handle_dap_info_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct swjdp_common *swjdp = &armv7a->swjdp_info;
 	uint32_t apsel;
@@ -289,7 +289,7 @@ COMMAND_HANDLER(handle_dap_info_command)
 
 COMMAND_HANDLER(handle_armv7a_disassemble_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 	int thumb = 0;
 	int count = 1;
diff --git a/src/target/armv7a.h b/src/target/armv7a.h
index c775d0c2..1b4884c3 100644
--- a/src/target/armv7a.h
+++ b/src/target/armv7a.h
@@ -108,26 +108,26 @@ struct armv7a_common
 	struct armv4_5_mmu_common armv4_5_mmu;
 	struct arm armv4_5_common;
 
-//	int (*full_context)(struct target_s *target);
-//	int (*read_core_reg)(struct target_s *target, int num, enum armv7a_mode mode);
-//	int (*write_core_reg)(struct target_s *target, int num, enum armv7a_mode mode, u32 value);
-	int (*read_cp15)(struct target_s *target,
+//	int (*full_context)(struct target *target);
+//	int (*read_core_reg)(struct target *target, int num, enum armv7a_mode mode);
+//	int (*write_core_reg)(struct target *target, int num, enum armv7a_mode mode, u32 value);
+	int (*read_cp15)(struct target *target,
 			uint32_t op1, uint32_t op2,
 			uint32_t CRn, uint32_t CRm, uint32_t *value);
-	int (*write_cp15)(struct target_s *target,
+	int (*write_cp15)(struct target *target,
 			uint32_t op1, uint32_t op2,
 			uint32_t CRn, uint32_t CRm, uint32_t value);
 
-	int (*examine_debug_reason)(target_t *target);
-	void (*post_debug_entry)(target_t *target);
+	int (*examine_debug_reason)(struct target *target);
+	void (*post_debug_entry)(struct target *target);
 
-	void (*pre_restore_context)(target_t *target);
-	void (*post_restore_context)(target_t *target);
+	void (*pre_restore_context)(struct target *target);
+	void (*post_restore_context)(struct target *target);
 
 };
 
 static inline struct armv7a_common *
-target_to_armv7a(struct target_s *target)
+target_to_armv7a(struct target *target)
 {
 	return container_of(target->arch_info, struct armv7a_common,
 			armv4_5_common);
@@ -145,15 +145,15 @@ struct armv7a_core_reg
 {
 	int num;
 	enum armv7a_mode mode;
-	target_t *target;
+	struct target *target;
 	struct armv7a_common *armv7a_common;
 };
 
-int armv7a_arch_state(struct target_s *target);
-struct reg_cache *armv7a_build_reg_cache(target_t *target,
+int armv7a_arch_state(struct target *target);
+struct reg_cache *armv7a_build_reg_cache(struct target *target,
 		struct armv7a_common *armv7a_common);
 int armv7a_register_commands(struct command_context_s *cmd_ctx);
-int armv7a_init_arch_info(target_t *target, struct armv7a_common *armv7a);
+int armv7a_init_arch_info(struct target *target, struct armv7a_common *armv7a);
 
 /* map psr mode bits to linear number */
 static inline int armv7a_mode_to_number(enum armv7a_mode mode)
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 29698039..9c2e95c3 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -133,7 +133,7 @@ static int armv7m_core_reg_arch_type = -1;
  * Restores target context using the cache of core registers set up
  * by armv7m_build_reg_cache(), calling optional core-specific hooks.
  */
-int armv7m_restore_context(target_t *target)
+int armv7m_restore_context(struct target *target)
 {
 	int i;
 	struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -182,7 +182,7 @@ static int armv7m_get_core_reg(struct reg *reg)
 {
 	int retval;
 	struct armv7m_core_reg *armv7m_reg = reg->arch_info;
-	target_t *target = armv7m_reg->target;
+	struct target *target = armv7m_reg->target;
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 
 	if (target->state != TARGET_HALTED)
@@ -198,7 +198,7 @@ static int armv7m_get_core_reg(struct reg *reg)
 static int armv7m_set_core_reg(struct reg *reg, uint8_t *buf)
 {
 	struct armv7m_core_reg *armv7m_reg = reg->arch_info;
-	target_t *target = armv7m_reg->target;
+	struct target *target = armv7m_reg->target;
 	uint32_t value = buf_get_u32(buf, 0, 32);
 
 	if (target->state != TARGET_HALTED)
@@ -213,7 +213,7 @@ static int armv7m_set_core_reg(struct reg *reg, uint8_t *buf)
 	return ERROR_OK;
 }
 
-static int armv7m_read_core_reg(struct target_s *target, int num)
+static int armv7m_read_core_reg(struct target *target, int num)
 {
 	uint32_t reg_value;
 	int retval;
@@ -232,7 +232,7 @@ static int armv7m_read_core_reg(struct target_s *target, int num)
 	return retval;
 }
 
-static int armv7m_write_core_reg(struct target_s *target, int num)
+static int armv7m_write_core_reg(struct target *target, int num)
 {
 	int retval;
 	uint32_t reg_value;
@@ -259,7 +259,7 @@ static int armv7m_write_core_reg(struct target_s *target, int num)
 }
 
 /** Invalidates cache of core registers set up by armv7m_build_reg_cache(). */
-int armv7m_invalidate_core_regs(target_t *target)
+int armv7m_invalidate_core_regs(struct target *target)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	int i;
@@ -279,7 +279,7 @@ int armv7m_invalidate_core_regs(target_t *target)
  * hardware, so this also fakes a set of long-obsolete FPA registers that
  * are not used in EABI based software stacks.
  */
-int armv7m_get_gdb_reg_list(target_t *target, struct reg **reg_list[], int *reg_list_size)
+int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	int i;
@@ -321,7 +321,7 @@ int armv7m_get_gdb_reg_list(target_t *target, struct reg **reg_list[], int *reg_
 }
 
 /* run to exit point. return error if exit point was not reached. */
-static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, int timeout_ms, uint32_t exit_point, struct armv7m_common *armv7m)
+static int armv7m_run_and_wait(struct target *target, uint32_t entry_point, int timeout_ms, uint32_t exit_point, struct armv7m_common *armv7m)
 {
 	uint32_t pc;
 	int retval;
@@ -356,7 +356,7 @@ static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, in
 }
 
 /** Runs a Thumb algorithm in the target. */
-int armv7m_run_algorithm(struct target_s *target,
+int armv7m_run_algorithm(struct target *target,
 	int num_mem_params, struct mem_param *mem_params,
 	int num_reg_params, struct reg_param *reg_params,
 	uint32_t entry_point, uint32_t exit_point,
@@ -501,7 +501,7 @@ int armv7m_run_algorithm(struct target_s *target,
 }
 
 /** Logs summary of ARMv7-M state for a halted target. */
-int armv7m_arch_state(struct target_s *target)
+int armv7m_arch_state(struct target *target)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	uint32_t ctrl, sp;
@@ -524,7 +524,7 @@ int armv7m_arch_state(struct target_s *target)
 }
 
 /** Builds cache of architecturally defined registers.  */
-struct reg_cache *armv7m_build_reg_cache(target_t *target)
+struct reg_cache *armv7m_build_reg_cache(struct target *target)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	int num_regs = ARMV7M_NUM_REGS;
@@ -573,7 +573,7 @@ struct reg_cache *armv7m_build_reg_cache(target_t *target)
 }
 
 /** Sets up target as a generic ARMv7-M core */
-int armv7m_init_arch_info(target_t *target, struct armv7m_common *armv7m)
+int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m)
 {
 	/* register arch-specific functions */
 
@@ -585,7 +585,7 @@ int armv7m_init_arch_info(target_t *target, struct armv7m_common *armv7m)
 }
 
 /** Generates a CRC32 checksum of a memory region. */
-int armv7m_checksum_memory(struct target_s *target,
+int armv7m_checksum_memory(struct target *target,
 		uint32_t address, uint32_t count, uint32_t* checksum)
 {
 	struct working_area *crc_algorithm;
@@ -668,7 +668,7 @@ int armv7m_checksum_memory(struct target_s *target,
 }
 
 /** Checks whether a memory region is zeroed. */
-int armv7m_blank_check_memory(struct target_s *target,
+int armv7m_blank_check_memory(struct target *target,
 		uint32_t address, uint32_t count, uint32_t* blank)
 {
 	struct working_area *erase_check_algorithm;
@@ -747,7 +747,7 @@ int armv7m_blank_check_memory(struct target_s *target,
  */
 COMMAND_HANDLER(handle_dap_baseaddr_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	struct swjdp_common *swjdp = &armv7m->swjdp_info;
 	uint32_t apsel, apselsave, baseaddr;
@@ -784,7 +784,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command)
  */
 COMMAND_HANDLER(handle_dap_apid_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	struct swjdp_common *swjdp = &armv7m->swjdp_info;
 
@@ -793,7 +793,7 @@ COMMAND_HANDLER(handle_dap_apid_command)
 
 COMMAND_HANDLER(handle_dap_apsel_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	struct swjdp_common *swjdp = &armv7m->swjdp_info;
 
@@ -802,7 +802,7 @@ COMMAND_HANDLER(handle_dap_apsel_command)
 
 COMMAND_HANDLER(handle_dap_memaccess_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	struct swjdp_common *swjdp = &armv7m->swjdp_info;
 
@@ -812,7 +812,7 @@ COMMAND_HANDLER(handle_dap_memaccess_command)
 
 COMMAND_HANDLER(handle_dap_info_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	struct swjdp_common *swjdp = &armv7m->swjdp_info;
 	uint32_t apsel;
diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 60f4cba0..7debd353 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -100,21 +100,21 @@ struct armv7m_common
 	struct swjdp_common swjdp_info;
 
 	/* Direct processor core register read and writes */
-	int (*load_core_reg_u32)(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
-	int (*store_core_reg_u32)(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t value);
+	int (*load_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
+	int (*store_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t value);
 	/* register cache to processor synchronization */
-	int (*read_core_reg)(struct target_s *target, int num);
-	int (*write_core_reg)(struct target_s *target, int num);
+	int (*read_core_reg)(struct target *target, int num);
+	int (*write_core_reg)(struct target *target, int num);
 
-	int (*examine_debug_reason)(target_t *target);
-	void (*post_debug_entry)(target_t *target);
+	int (*examine_debug_reason)(struct target *target);
+	void (*post_debug_entry)(struct target *target);
 
-	void (*pre_restore_context)(target_t *target);
-	void (*post_restore_context)(target_t *target);
+	void (*pre_restore_context)(struct target *target);
+	void (*post_restore_context)(struct target *target);
 };
 
 static inline struct armv7m_common *
-target_to_armv7m(struct target_s *target)
+target_to_armv7m(struct target *target)
 {
 	return target->arch_info;
 }
@@ -130,34 +130,34 @@ struct armv7m_core_reg
 {
 	uint32_t num;
 	enum armv7m_regtype type;
-	target_t *target;
+	struct target *target;
 	struct armv7m_common *armv7m_common;
 };
 
-struct reg_cache *armv7m_build_reg_cache(target_t *target);
+struct reg_cache *armv7m_build_reg_cache(struct target *target);
 enum armv7m_mode armv7m_number_to_mode(int number);
 int armv7m_mode_to_number(enum armv7m_mode mode);
 
-int armv7m_arch_state(struct target_s *target);
-int armv7m_get_gdb_reg_list(target_t *target,
+int armv7m_arch_state(struct target *target);
+int armv7m_get_gdb_reg_list(struct target *target,
 		struct reg **reg_list[], int *reg_list_size);
 
 int armv7m_register_commands(struct command_context_s *cmd_ctx);
-int armv7m_init_arch_info(target_t *target, struct armv7m_common *armv7m);
+int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
 
-int armv7m_run_algorithm(struct target_s *target,
+int armv7m_run_algorithm(struct target *target,
 		int num_mem_params, struct mem_param *mem_params,
 		int num_reg_params, struct reg_param *reg_params,
 		uint32_t entry_point, uint32_t exit_point,
 		int timeout_ms, void *arch_info);
 
-int armv7m_invalidate_core_regs(target_t *target);
+int armv7m_invalidate_core_regs(struct target *target);
 
-int armv7m_restore_context(target_t *target);
+int armv7m_restore_context(struct target *target);
 
-int armv7m_checksum_memory(struct target_s *target,
+int armv7m_checksum_memory(struct target *target,
 		uint32_t address, uint32_t count, uint32_t* checksum);
-int armv7m_blank_check_memory(struct target_s *target,
+int armv7m_blank_check_memory(struct target *target,
 		uint32_t address, uint32_t count, uint32_t* blank);
 
 /* Thumb mode instructions
diff --git a/src/target/avrt.c b/src/target/avrt.c
index ad22c99d..43715614 100644
--- a/src/target/avrt.c
+++ b/src/target/avrt.c
@@ -32,18 +32,18 @@
 int avr_register_commands(struct command_context_s *cmd_ctx);
 
 /* forward declarations */
-int avr_target_create(struct target_s *target, Jim_Interp *interp);
-int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
+int avr_target_create(struct target *target, Jim_Interp *interp);
+int avr_init_target(struct command_context_s *cmd_ctx, struct target *target);
 
-int avr_arch_state(struct target_s *target);
-int avr_poll(target_t *target);
-int avr_halt(target_t *target);
-int avr_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
-int avr_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
+int avr_arch_state(struct target *target);
+int avr_poll(struct target *target);
+int avr_halt(struct target *target);
+int avr_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+int avr_step(struct target *target, int current, uint32_t address, int handle_breakpoints);
 
-int avr_assert_reset(target_t *target);
-int avr_deassert_reset(target_t *target);
-int avr_soft_reset_halt(struct target_s *target);
+int avr_assert_reset(struct target *target);
+int avr_deassert_reset(struct target *target);
+int avr_soft_reset_halt(struct target *target);
 
 /* IR and DR functions */
 int avr_jtag_sendinstr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out);
@@ -102,7 +102,7 @@ int avr_register_commands(struct command_context_s *cmd_ctx)
 	return ERROR_OK;
 }
 
-int avr_target_create(struct target_s *target, Jim_Interp *interp)
+int avr_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct avr_common *avr = calloc(1, sizeof(struct avr_common));
 
@@ -112,19 +112,19 @@ int avr_target_create(struct target_s *target, Jim_Interp *interp)
 	return ERROR_OK;
 }
 
-int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+int avr_init_target(struct command_context_s *cmd_ctx, struct target *target)
 {
 	LOG_DEBUG("%s", __FUNCTION__);
 	return ERROR_OK;
 }
 
-int avr_arch_state(struct target_s *target)
+int avr_arch_state(struct target *target)
 {
 	LOG_DEBUG("%s", __FUNCTION__);
 	return ERROR_OK;
 }
 
-int avr_poll(target_t *target)
+int avr_poll(struct target *target)
 {
 	if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING))
 	{
@@ -135,25 +135,25 @@ int avr_poll(target_t *target)
 	return ERROR_OK;
 }
 
-int avr_halt(target_t *target)
+int avr_halt(struct target *target)
 {
 	LOG_DEBUG("%s", __FUNCTION__);
 	return ERROR_OK;
 }
 
-int avr_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
+int avr_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
 {
 	LOG_DEBUG("%s", __FUNCTION__);
 	return ERROR_OK;
 }
 
-int avr_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
+int avr_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
 {
 	LOG_DEBUG("%s", __FUNCTION__);
 	return ERROR_OK;
 }
 
-int avr_assert_reset(target_t *target)
+int avr_assert_reset(struct target *target)
 {
 	target->state = TARGET_RESET;
 
@@ -161,7 +161,7 @@ int avr_assert_reset(target_t *target)
 	return ERROR_OK;
 }
 
-int avr_deassert_reset(target_t *target)
+int avr_deassert_reset(struct target *target)
 {
 	target->state = TARGET_RUNNING;
 
@@ -169,7 +169,7 @@ int avr_deassert_reset(target_t *target)
 	return ERROR_OK;
 }
 
-int avr_soft_reset_halt(struct target_s *target)
+int avr_soft_reset_halt(struct target *target)
 {
 	LOG_DEBUG("%s", __FUNCTION__);
 	return ERROR_OK;
diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c
index a65ca824..f2b6ff78 100644
--- a/src/target/breakpoints.c
+++ b/src/target/breakpoints.c
@@ -42,7 +42,7 @@ static char *watchpoint_rw_strings[] =
 // monotonic counter/id-number for breakpoints and watch points
 static int bpwp_unique_id;
 
-int breakpoint_add(target_t *target, uint32_t address, uint32_t length, enum breakpoint_type type)
+int breakpoint_add(struct target *target, uint32_t address, uint32_t length, enum breakpoint_type type)
 {
 	struct breakpoint *breakpoint = target->breakpoints;
 	struct breakpoint **breakpoint_p = &target->breakpoints;
@@ -107,7 +107,7 @@ int breakpoint_add(target_t *target, uint32_t address, uint32_t length, enum bre
 }
 
 /* free up a breakpoint */
-static void breakpoint_free(target_t *target, struct breakpoint *breakpoint_remove)
+static void breakpoint_free(struct target *target, struct breakpoint *breakpoint_remove)
 {
 	struct breakpoint *breakpoint = target->breakpoints;
 	struct breakpoint **breakpoint_p = &target->breakpoints;
@@ -131,7 +131,7 @@ static void breakpoint_free(target_t *target, struct breakpoint *breakpoint_remo
 	free(breakpoint);
 }
 
-void breakpoint_remove(target_t *target, uint32_t address)
+void breakpoint_remove(struct target *target, uint32_t address)
 {
 	struct breakpoint *breakpoint = target->breakpoints;
 	struct breakpoint **breakpoint_p = &target->breakpoints;
@@ -154,7 +154,7 @@ void breakpoint_remove(target_t *target, uint32_t address)
 	}
 }
 
-void breakpoint_clear_target(target_t *target)
+void breakpoint_clear_target(struct target *target)
 {
 	struct breakpoint *breakpoint;
 	LOG_DEBUG("Delete all breakpoints for target: %s", target_get_name( target ));
@@ -164,7 +164,7 @@ void breakpoint_clear_target(target_t *target)
 	}
 }
 
-struct breakpoint* breakpoint_find(target_t *target, uint32_t address)
+struct breakpoint* breakpoint_find(struct target *target, uint32_t address)
 {
 	struct breakpoint *breakpoint = target->breakpoints;
 
@@ -178,7 +178,7 @@ struct breakpoint* breakpoint_find(target_t *target, uint32_t address)
 	return NULL;
 }
 
-int watchpoint_add(target_t *target, uint32_t address, uint32_t length,
+int watchpoint_add(struct target *target, uint32_t address, uint32_t length,
 		enum watchpoint_rw rw, uint32_t value, uint32_t mask)
 {
 	struct watchpoint *watchpoint = target->watchpoints;
@@ -244,7 +244,7 @@ bye:
 	return ERROR_OK;
 }
 
-static void watchpoint_free(target_t *target, struct watchpoint *watchpoint_remove)
+static void watchpoint_free(struct target *target, struct watchpoint *watchpoint_remove)
 {
 	struct watchpoint *watchpoint = target->watchpoints;
 	struct watchpoint **watchpoint_p = &target->watchpoints;
@@ -265,7 +265,7 @@ static void watchpoint_free(target_t *target, struct watchpoint *watchpoint_remo
 	free(watchpoint);
 }
 
-void watchpoint_remove(target_t *target, uint32_t address)
+void watchpoint_remove(struct target *target, uint32_t address)
 {
 	struct watchpoint *watchpoint = target->watchpoints;
 	struct watchpoint **watchpoint_p = &target->watchpoints;
@@ -288,7 +288,7 @@ void watchpoint_remove(target_t *target, uint32_t address)
 	}
 }
 
-void watchpoint_clear_target(target_t *target)
+void watchpoint_clear_target(struct target *target)
 {
 	struct watchpoint *watchpoint;
 	LOG_DEBUG("Delete all watchpoints for target: %s", target_get_name( target ));
diff --git a/src/target/breakpoints.h b/src/target/breakpoints.h
index 2a79a9ad..a65f20e3 100644
--- a/src/target/breakpoints.h
+++ b/src/target/breakpoints.h
@@ -22,7 +22,7 @@
 
 #include "types.h"
 
-struct target_s;
+struct target;
 
 enum breakpoint_type
 {
@@ -58,17 +58,17 @@ struct watchpoint
 	int unique_id;
 };
 
-void breakpoint_clear_target(struct target_s *target);
-int breakpoint_add(struct target_s *target,
+void breakpoint_clear_target(struct target *target);
+int breakpoint_add(struct target *target,
 		uint32_t address, uint32_t length, enum breakpoint_type type);
-void breakpoint_remove(struct target_s *target, uint32_t address);
+void breakpoint_remove(struct target *target, uint32_t address);
 
-struct breakpoint* breakpoint_find(struct target_s *target, uint32_t address);
+struct breakpoint* breakpoint_find(struct target *target, uint32_t address);
 
-void watchpoint_clear_target(struct target_s *target);
-int watchpoint_add(struct target_s *target,
+void watchpoint_clear_target(struct target *target);
+int watchpoint_add(struct target *target,
 		uint32_t address, uint32_t length,
 		enum watchpoint_rw rw, uint32_t value, uint32_t mask);
-void watchpoint_remove(struct target_s *target, uint32_t address);
+void watchpoint_remove(struct target *target, uint32_t address);
 
 #endif /* BREAKPOINTS_H */
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index f9253115..586b9ea6 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -40,16 +40,16 @@
 #include "target_request.h"
 #include "target_type.h"
 
-static int cortex_a8_poll(target_t *target);
-static int cortex_a8_debug_entry(target_t *target);
-static int cortex_a8_restore_context(target_t *target);
-static int cortex_a8_set_breakpoint(struct target_s *target,
+static int cortex_a8_poll(struct target *target);
+static int cortex_a8_debug_entry(struct target *target);
+static int cortex_a8_restore_context(struct target *target);
+static int cortex_a8_set_breakpoint(struct target *target,
 		struct breakpoint *breakpoint, uint8_t matchmode);
-static int cortex_a8_unset_breakpoint(struct target_s *target,
+static int cortex_a8_unset_breakpoint(struct target *target,
 		struct breakpoint *breakpoint);
-static int cortex_a8_dap_read_coreregister_u32(target_t *target,
+static int cortex_a8_dap_read_coreregister_u32(struct target *target,
 		uint32_t *value, int regnum);
-static int cortex_a8_dap_write_coreregister_u32(target_t *target,
+static int cortex_a8_dap_write_coreregister_u32(struct target *target,
 		uint32_t value, int regnum);
 /*
  * FIXME do topology discovery using the ROM; don't
@@ -62,7 +62,7 @@ static int cortex_a8_dap_write_coreregister_u32(target_t *target,
 /*
  * Cortex-A8 Basic debug access, very low level assumes state is saved
  */
-static int cortex_a8_init_debug_access(target_t *target)
+static int cortex_a8_init_debug_access(struct target *target)
 {
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct swjdp_common *swjdp = &armv7a->swjdp_info;
@@ -90,7 +90,7 @@ static int cortex_a8_init_debug_access(target_t *target)
 	return retval;
 }
 
-int cortex_a8_exec_opcode(target_t *target, uint32_t opcode)
+int cortex_a8_exec_opcode(struct target *target, uint32_t opcode)
 {
 	uint32_t dscr;
 	int retval;
@@ -131,7 +131,7 @@ int cortex_a8_exec_opcode(target_t *target, uint32_t opcode)
 Read core register with very few exec_opcode, fast but needs work_area.
 This can cause problems with MMU active.
 **************************************************************************/
-static int cortex_a8_read_regs_through_mem(target_t *target, uint32_t address,
+static int cortex_a8_read_regs_through_mem(struct target *target, uint32_t address,
 		uint32_t * regfile)
 {
 	int retval = ERROR_OK;
@@ -148,7 +148,7 @@ static int cortex_a8_read_regs_through_mem(target_t *target, uint32_t address,
 	return retval;
 }
 
-static int cortex_a8_read_cp(target_t *target, uint32_t *value, uint8_t CP,
+static int cortex_a8_read_cp(struct target *target, uint32_t *value, uint8_t CP,
 		uint8_t op1, uint8_t CRn, uint8_t CRm, uint8_t op2)
 {
 	int retval;
@@ -166,7 +166,7 @@ static int cortex_a8_read_cp(target_t *target, uint32_t *value, uint8_t CP,
 	return retval;
 }
 
-static int cortex_a8_write_cp(target_t *target, uint32_t value,
+static int cortex_a8_write_cp(struct target *target, uint32_t value,
 	uint8_t CP, uint8_t op1, uint8_t CRn, uint8_t CRm, uint8_t op2)
 {
 	int retval;
@@ -195,19 +195,19 @@ static int cortex_a8_write_cp(target_t *target, uint32_t value,
 	return retval;
 }
 
-static int cortex_a8_read_cp15(target_t *target, uint32_t op1, uint32_t op2,
+static int cortex_a8_read_cp15(struct target *target, uint32_t op1, uint32_t op2,
 		uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	return cortex_a8_read_cp(target, value, 15, op1, CRn, CRm, op2);
 }
 
-static int cortex_a8_write_cp15(target_t *target, uint32_t op1, uint32_t op2,
+static int cortex_a8_write_cp15(struct target *target, uint32_t op1, uint32_t op2,
 		uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	return cortex_a8_write_cp(target, value, 15, op1, CRn, CRm, op2);
 }
 
-static int cortex_a8_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int cortex_a8_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	if (cpnum!=15)
 	{
@@ -217,7 +217,7 @@ static int cortex_a8_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2
 	return cortex_a8_read_cp15(target, op1, op2, CRn, CRm, value);
 }
 
-static int cortex_a8_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int cortex_a8_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	if (cpnum!=15)
 	{
@@ -229,7 +229,7 @@ static int cortex_a8_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2
 
 
 
-static int cortex_a8_dap_read_coreregister_u32(target_t *target,
+static int cortex_a8_dap_read_coreregister_u32(struct target *target,
 		uint32_t *value, int regnum)
 {
 	int retval = ERROR_OK;
@@ -271,7 +271,7 @@ static int cortex_a8_dap_read_coreregister_u32(target_t *target,
 	return retval;
 }
 
-static int cortex_a8_dap_write_coreregister_u32(target_t *target, uint32_t value, int regnum)
+static int cortex_a8_dap_write_coreregister_u32(struct target *target, uint32_t value, int regnum)
 {
 	int retval = ERROR_OK;
 	uint8_t Rd = regnum&0xFF;
@@ -320,7 +320,7 @@ static int cortex_a8_dap_write_coreregister_u32(target_t *target, uint32_t value
 }
 
 /* Write to memory mapped registers directly with no cache or mmu handling */
-static int cortex_a8_dap_write_memap_register_u32(target_t *target, uint32_t address, uint32_t value)
+static int cortex_a8_dap_write_memap_register_u32(struct target *target, uint32_t address, uint32_t value)
 {
 	int retval;
 	struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -335,7 +335,7 @@ static int cortex_a8_dap_write_memap_register_u32(target_t *target, uint32_t add
  * Cortex-A8 Run control
  */
 
-static int cortex_a8_poll(target_t *target)
+static int cortex_a8_poll(struct target *target)
 {
 	int retval = ERROR_OK;
 	uint32_t dscr;
@@ -400,7 +400,7 @@ static int cortex_a8_poll(target_t *target)
 	return retval;
 }
 
-static int cortex_a8_halt(target_t *target)
+static int cortex_a8_halt(struct target *target)
 {
 	int retval = ERROR_OK;
 	uint32_t dscr;
@@ -438,7 +438,7 @@ out:
 	return retval;
 }
 
-static int cortex_a8_resume(struct target_s *target, int current,
+static int cortex_a8_resume(struct target *target, int current,
 		uint32_t address, int handle_breakpoints, int debug_execution)
 {
 	struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -559,7 +559,7 @@ static int cortex_a8_resume(struct target_s *target, int current,
 	return ERROR_OK;
 }
 
-static int cortex_a8_debug_entry(target_t *target)
+static int cortex_a8_debug_entry(struct target *target)
 {
 	int i;
 	uint32_t regfile[16], pc, cpsr, dscr;
@@ -688,7 +688,7 @@ static int cortex_a8_debug_entry(target_t *target)
 
 }
 
-static void cortex_a8_post_debug_entry(target_t *target)
+static void cortex_a8_post_debug_entry(struct target *target)
 {
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
 	struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
@@ -720,7 +720,7 @@ static void cortex_a8_post_debug_entry(target_t *target)
 
 }
 
-static int cortex_a8_step(struct target_s *target, int current, uint32_t address,
+static int cortex_a8_step(struct target *target, int current, uint32_t address,
 		int handle_breakpoints)
 {
 	struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -799,7 +799,7 @@ static int cortex_a8_step(struct target_s *target, int current, uint32_t address
 	return ERROR_OK;
 }
 
-static int cortex_a8_restore_context(target_t *target)
+static int cortex_a8_restore_context(struct target *target)
 {
 	int i;
 	uint32_t value;
@@ -835,7 +835,7 @@ static int cortex_a8_restore_context(target_t *target)
 /*
  * Cortex-A8 Core register functions
  */
-static int cortex_a8_load_core_reg_u32(struct target_s *target, int num,
+static int cortex_a8_load_core_reg_u32(struct target *target, int num,
 		armv4_5_mode_t mode, uint32_t * value)
 {
 	int retval;
@@ -872,7 +872,7 @@ static int cortex_a8_load_core_reg_u32(struct target_s *target, int num,
 	return ERROR_OK;
 }
 
-static int cortex_a8_store_core_reg_u32(struct target_s *target, int num,
+static int cortex_a8_store_core_reg_u32(struct target *target, int num,
 		armv4_5_mode_t mode, uint32_t value)
 {
 	int retval;
@@ -914,7 +914,7 @@ static int cortex_a8_store_core_reg_u32(struct target_s *target, int num,
 #endif
 
 
-static int cortex_a8_read_core_reg(struct target_s *target, int num,
+static int cortex_a8_read_core_reg(struct target *target, int num,
 		enum armv4_5_mode mode)
 {
 	uint32_t value;
@@ -936,7 +936,7 @@ static int cortex_a8_read_core_reg(struct target_s *target, int num,
 	return ERROR_OK;
 }
 
-int cortex_a8_write_core_reg(struct target_s *target, int num,
+int cortex_a8_write_core_reg(struct target *target, int num,
 		enum armv4_5_mode mode, uint32_t value)
 {
 	int retval;
@@ -960,7 +960,7 @@ int cortex_a8_write_core_reg(struct target_s *target, int num,
  */
 
 /* Setup hardware Breakpoint Register Pair */
-static int cortex_a8_set_breakpoint(struct target_s *target,
+static int cortex_a8_set_breakpoint(struct target *target,
 		struct breakpoint *breakpoint, uint8_t matchmode)
 {
 	int retval;
@@ -1035,7 +1035,7 @@ static int cortex_a8_set_breakpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int cortex_a8_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+static int cortex_a8_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	int retval;
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
@@ -1093,7 +1093,7 @@ static int cortex_a8_unset_breakpoint(struct target_s *target, struct breakpoint
 	return ERROR_OK;
 }
 
-int cortex_a8_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+int cortex_a8_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
 
@@ -1110,7 +1110,7 @@ int cortex_a8_add_breakpoint(struct target_s *target, struct breakpoint *breakpo
 	return ERROR_OK;
 }
 
-static int cortex_a8_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+static int cortex_a8_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
 
@@ -1140,7 +1140,7 @@ static int cortex_a8_remove_breakpoint(struct target_s *target, struct breakpoin
  * Cortex-A8 Reset fuctions
  */
 
-static int cortex_a8_assert_reset(target_t *target)
+static int cortex_a8_assert_reset(struct target *target)
 {
 
 	LOG_DEBUG(" ");
@@ -1153,7 +1153,7 @@ static int cortex_a8_assert_reset(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_a8_deassert_reset(target_t *target)
+static int cortex_a8_deassert_reset(struct target *target)
 {
 
 	LOG_DEBUG(" ");
@@ -1175,7 +1175,7 @@ static int cortex_a8_deassert_reset(target_t *target)
  * ap number for every access.
  */
 
-static int cortex_a8_read_memory(struct target_s *target, uint32_t address,
+static int cortex_a8_read_memory(struct target *target, uint32_t address,
 		uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -1210,7 +1210,7 @@ static int cortex_a8_read_memory(struct target_s *target, uint32_t address,
 	return retval;
 }
 
-int cortex_a8_write_memory(struct target_s *target, uint32_t address,
+int cortex_a8_write_memory(struct target *target, uint32_t address,
 		uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -1264,7 +1264,7 @@ int cortex_a8_write_memory(struct target_s *target, uint32_t address,
 	return retval;
 }
 
-static int cortex_a8_bulk_write_memory(target_t *target, uint32_t address,
+static int cortex_a8_bulk_write_memory(struct target *target, uint32_t address,
 		uint32_t count, uint8_t *buffer)
 {
 	return cortex_a8_write_memory(target, address, 4, count, buffer);
@@ -1296,7 +1296,7 @@ static int cortex_a8_dcc_read(struct swjdp_common *swjdp, uint8_t *value, uint8_
 
 static int cortex_a8_handle_target_request(void *priv)
 {
-	target_t *target = priv;
+	struct target *target = priv;
 	if (!target->type->examined)
 		return ERROR_OK;
 	struct armv7a_common *armv7a = target_to_armv7a(target);
@@ -1336,7 +1336,7 @@ static int cortex_a8_handle_target_request(void *priv)
  * Cortex-A8 target information and configuration
  */
 
-static int cortex_a8_examine(struct target_s *target)
+static int cortex_a8_examine(struct target *target)
 {
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
 	struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
@@ -1433,7 +1433,7 @@ static int cortex_a8_examine(struct target_s *target)
  *	Cortex-A8 target creation and initialization
  */
 
-static void cortex_a8_build_reg_cache(target_t *target)
+static void cortex_a8_build_reg_cache(struct target *target)
 {
 	struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
@@ -1444,13 +1444,13 @@ static void cortex_a8_build_reg_cache(target_t *target)
 
 
 static int cortex_a8_init_target(struct command_context_s *cmd_ctx,
-		struct target_s *target)
+		struct target *target)
 {
 	cortex_a8_build_reg_cache(target);
 	return ERROR_OK;
 }
 
-int cortex_a8_init_arch_info(target_t *target,
+int cortex_a8_init_arch_info(struct target *target,
 		struct cortex_a8_common *cortex_a8, struct jtag_tap *tap)
 {
 	struct arm *armv4_5;
@@ -1517,7 +1517,7 @@ LOG_DEBUG(" ");
 	return ERROR_OK;
 }
 
-static int cortex_a8_target_create(struct target_s *target, Jim_Interp *interp)
+static int cortex_a8_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct cortex_a8_common *cortex_a8 = calloc(1, sizeof(struct cortex_a8_common));
 
@@ -1528,7 +1528,7 @@ static int cortex_a8_target_create(struct target_s *target, Jim_Interp *interp)
 
 COMMAND_HANDLER(cortex_a8_handle_cache_info_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 
 	return armv4_5_handle_cache_info_command(cmd_ctx,
@@ -1538,7 +1538,7 @@ COMMAND_HANDLER(cortex_a8_handle_cache_info_command)
 
 COMMAND_HANDLER(cortex_a8_handle_dbginit_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 
 	cortex_a8_init_debug_access(target);
 
diff --git a/src/target/cortex_a8.h b/src/target/cortex_a8.h
index e3b99ee4..e7ea6c75 100644
--- a/src/target/cortex_a8.h
+++ b/src/target/cortex_a8.h
@@ -137,13 +137,13 @@ struct cortex_a8_common
 };
 
 static inline struct cortex_a8_common *
-target_to_cortex_a8(struct target_s *target)
+target_to_cortex_a8(struct target *target)
 {
 	return container_of(target->arch_info, struct cortex_a8_common,
 			armv7a_common.armv4_5_common);
 }
 
-int cortex_a8_init_arch_info(target_t *target,
+int cortex_a8_init_arch_info(struct target *target,
 		struct cortex_a8_common *cortex_a8, struct jtag_tap *tap);
 
 #endif /* CORTEX_A8_H */
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index 58c3d8f7..eea9c880 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -45,10 +45,10 @@
 
 
 /* forward declarations */
-static int cortex_m3_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint);
-static int cortex_m3_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint);
-static void cortex_m3_enable_watchpoints(struct target_s *target);
-static int cortex_m3_store_core_reg_u32(target_t *target,
+static int cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint);
+static int cortex_m3_unset_breakpoint(struct target *target, struct breakpoint *breakpoint);
+static void cortex_m3_enable_watchpoints(struct target *target);
+static int cortex_m3_store_core_reg_u32(struct target *target,
 		enum armv7m_regtype type, uint32_t num, uint32_t value);
 
 #ifdef ARMV7_GDB_HACKS
@@ -118,7 +118,7 @@ static int cortexm3_dap_write_coreregister_u32(struct swjdp_common *swjdp,
 	return retval;
 }
 
-static int cortex_m3_write_debug_halt_mask(target_t *target,
+static int cortex_m3_write_debug_halt_mask(struct target *target,
 		uint32_t mask_on, uint32_t mask_off)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
@@ -132,7 +132,7 @@ static int cortex_m3_write_debug_halt_mask(target_t *target,
 	return mem_ap_write_atomic_u32(swjdp, DCB_DHCSR, cortex_m3->dcb_dhcsr);
 }
 
-static int cortex_m3_clear_halt(target_t *target)
+static int cortex_m3_clear_halt(struct target *target)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 	struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
@@ -149,7 +149,7 @@ static int cortex_m3_clear_halt(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_m3_single_step_core(target_t *target)
+static int cortex_m3_single_step_core(struct target *target)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 	struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
@@ -171,7 +171,7 @@ static int cortex_m3_single_step_core(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_m3_endreset_event(target_t *target)
+static int cortex_m3_endreset_event(struct target *target)
 {
 	int i;
 	uint32_t dcb_demcr;
@@ -229,7 +229,7 @@ static int cortex_m3_endreset_event(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_m3_examine_debug_reason(target_t *target)
+static int cortex_m3_examine_debug_reason(struct target *target)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
@@ -256,7 +256,7 @@ static int cortex_m3_examine_debug_reason(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_m3_examine_exception_reason(target_t *target)
+static int cortex_m3_examine_exception_reason(struct target *target)
 {
 	uint32_t shcsr, except_sr, cfsr = -1, except_ar = -1;
 	struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -304,7 +304,7 @@ static int cortex_m3_examine_exception_reason(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_m3_debug_entry(target_t *target)
+static int cortex_m3_debug_entry(struct target *target)
 {
 	int i;
 	uint32_t xPSR;
@@ -376,7 +376,7 @@ static int cortex_m3_debug_entry(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_m3_poll(target_t *target)
+static int cortex_m3_poll(struct target *target)
 {
 	int retval;
 	enum target_state prev_target_state = target->state;
@@ -450,7 +450,7 @@ static int cortex_m3_poll(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_m3_halt(target_t *target)
+static int cortex_m3_halt(struct target *target)
 {
 	LOG_DEBUG("target->state: %s",
 		target_state_name(target));
@@ -492,7 +492,7 @@ static int cortex_m3_halt(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_m3_soft_reset_halt(struct target_s *target)
+static int cortex_m3_soft_reset_halt(struct target *target)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 	struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
@@ -531,7 +531,7 @@ static int cortex_m3_soft_reset_halt(struct target_s *target)
 	return ERROR_OK;
 }
 
-static void cortex_m3_enable_breakpoints(struct target_s *target)
+static void cortex_m3_enable_breakpoints(struct target *target)
 {
 	struct breakpoint *breakpoint = target->breakpoints;
 
@@ -544,7 +544,7 @@ static void cortex_m3_enable_breakpoints(struct target_s *target)
 	}
 }
 
-static int cortex_m3_resume(struct target_s *target, int current,
+static int cortex_m3_resume(struct target *target, int current,
 		uint32_t address, int handle_breakpoints, int debug_execution)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -632,7 +632,7 @@ static int cortex_m3_resume(struct target_s *target, int current,
 }
 
 /* int irqstepcount = 0; */
-static int cortex_m3_step(struct target_s *target, int current,
+static int cortex_m3_step(struct target *target, int current,
 		uint32_t address, int handle_breakpoints)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
@@ -684,7 +684,7 @@ static int cortex_m3_step(struct target_s *target, int current,
 	return ERROR_OK;
 }
 
-static int cortex_m3_assert_reset(target_t *target)
+static int cortex_m3_assert_reset(struct target *target)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 	struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
@@ -821,7 +821,7 @@ static int cortex_m3_assert_reset(target_t *target)
 	return ERROR_OK;
 }
 
-static int cortex_m3_deassert_reset(target_t *target)
+static int cortex_m3_deassert_reset(struct target *target)
 {
 	LOG_DEBUG("target->state: %s",
 		target_state_name(target));
@@ -833,7 +833,7 @@ static int cortex_m3_deassert_reset(target_t *target)
 }
 
 static int
-cortex_m3_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	int retval;
 	int fp_num = 0;
@@ -900,7 +900,7 @@ cortex_m3_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 }
 
 static int
-cortex_m3_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+cortex_m3_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	int retval;
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
@@ -955,7 +955,7 @@ cortex_m3_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoin
 }
 
 static int
-cortex_m3_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+cortex_m3_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
@@ -1004,7 +1004,7 @@ cortex_m3_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 }
 
 static int
-cortex_m3_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+cortex_m3_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
@@ -1032,7 +1032,7 @@ cortex_m3_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoi
 }
 
 static int
-cortex_m3_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+cortex_m3_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	int dwt_num = 0;
 	uint32_t mask, temp;
@@ -1097,7 +1097,7 @@ cortex_m3_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 }
 
 static int
-cortex_m3_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+cortex_m3_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 	struct cortex_m3_dwt_comparator *comparator;
@@ -1134,7 +1134,7 @@ cortex_m3_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoin
 }
 
 static int
-cortex_m3_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+cortex_m3_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
@@ -1192,7 +1192,7 @@ cortex_m3_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 }
 
 static int
-cortex_m3_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+cortex_m3_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
@@ -1214,7 +1214,7 @@ cortex_m3_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoi
 	return ERROR_OK;
 }
 
-static void cortex_m3_enable_watchpoints(struct target_s *target)
+static void cortex_m3_enable_watchpoints(struct target *target)
 {
 	struct watchpoint *watchpoint = target->watchpoints;
 
@@ -1227,7 +1227,7 @@ static void cortex_m3_enable_watchpoints(struct target_s *target)
 	}
 }
 
-static int cortex_m3_load_core_reg_u32(struct target_s *target,
+static int cortex_m3_load_core_reg_u32(struct target *target,
 		enum armv7m_regtype type, uint32_t num, uint32_t * value)
 {
 	int retval;
@@ -1290,7 +1290,7 @@ static int cortex_m3_load_core_reg_u32(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int cortex_m3_store_core_reg_u32(struct target_s *target,
+static int cortex_m3_store_core_reg_u32(struct target *target,
 		enum armv7m_regtype type, uint32_t num, uint32_t value)
 {
 	int retval;
@@ -1367,7 +1367,7 @@ static int cortex_m3_store_core_reg_u32(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int cortex_m3_read_memory(struct target_s *target, uint32_t address,
+static int cortex_m3_read_memory(struct target *target, uint32_t address,
 		uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -1399,7 +1399,7 @@ static int cortex_m3_read_memory(struct target_s *target, uint32_t address,
 	return retval;
 }
 
-static int cortex_m3_write_memory(struct target_s *target, uint32_t address,
+static int cortex_m3_write_memory(struct target *target, uint32_t address,
 		uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -1429,14 +1429,14 @@ static int cortex_m3_write_memory(struct target_s *target, uint32_t address,
 	return retval;
 }
 
-static int cortex_m3_bulk_write_memory(target_t *target, uint32_t address,
+static int cortex_m3_bulk_write_memory(struct target *target, uint32_t address,
 		uint32_t count, uint8_t *buffer)
 {
 	return cortex_m3_write_memory(target, address, 4, count, buffer);
 }
 
 static int cortex_m3_init_target(struct command_context_s *cmd_ctx,
-		struct target_s *target)
+		struct target *target)
 {
 	armv7m_build_reg_cache(target);
 	return ERROR_OK;
@@ -1448,7 +1448,7 @@ static int cortex_m3_init_target(struct command_context_s *cmd_ctx,
  */
 
 struct dwt_reg_state {
-	struct target_s	*target;
+	struct target	*target;
 	uint32_t	addr;
 	uint32_t	value;	/* scratch/cache */
 };
@@ -1495,7 +1495,7 @@ static struct dwt_reg dwt_comp[] = {
 static int dwt_reg_type = -1;
 
 static void
-cortex_m3_dwt_addreg(struct target_s *t, struct reg *r, struct dwt_reg *d)
+cortex_m3_dwt_addreg(struct target *t, struct reg *r, struct dwt_reg *d)
 {
 	struct dwt_reg_state *state;
 
@@ -1513,7 +1513,7 @@ cortex_m3_dwt_addreg(struct target_s *t, struct reg *r, struct dwt_reg *d)
 }
 
 static void
-cortex_m3_dwt_setup(struct cortex_m3_common *cm3, struct target_s *target)
+cortex_m3_dwt_setup(struct cortex_m3_common *cm3, struct target *target)
 {
 	uint32_t dwtcr;
 	struct reg_cache *cache;
@@ -1582,7 +1582,7 @@ fail1:
 	 */
 }
 
-static int cortex_m3_examine(struct target_s *target)
+static int cortex_m3_examine(struct target *target)
 {
 	int retval;
 	uint32_t cpuid, fpcr;
@@ -1651,7 +1651,7 @@ static int cortex_m3_dcc_read(struct swjdp_common *swjdp, uint8_t *value, uint8_
 	return ERROR_OK;
 }
 
-static int cortex_m3_target_request_data(target_t *target,
+static int cortex_m3_target_request_data(struct target *target,
 		uint32_t size, uint8_t *buffer)
 {
 	struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -1671,7 +1671,7 @@ static int cortex_m3_target_request_data(target_t *target,
 
 static int cortex_m3_handle_target_request(void *priv)
 {
-	target_t *target = priv;
+	struct target *target = priv;
 	if (!target_was_examined(target))
 		return ERROR_OK;
 	struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -1707,7 +1707,7 @@ static int cortex_m3_handle_target_request(void *priv)
 	return ERROR_OK;
 }
 
-static int cortex_m3_init_arch_info(target_t *target,
+static int cortex_m3_init_arch_info(struct target *target,
 		struct cortex_m3_common *cortex_m3, struct jtag_tap *tap)
 {
 	int retval;
@@ -1747,7 +1747,7 @@ static int cortex_m3_init_arch_info(target_t *target,
 	return ERROR_OK;
 }
 
-static int cortex_m3_target_create(struct target_s *target, Jim_Interp *interp)
+static int cortex_m3_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct cortex_m3_common *cortex_m3 = calloc(1,sizeof(struct cortex_m3_common));
 
@@ -1784,7 +1784,7 @@ static int cortex_m3_verify_pointer(struct command_context_s *cmd_ctx,
 COMMAND_HANDLER(handle_cortex_m3_disassemble_command)
 {
 	int retval;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 	uint32_t address;
 	unsigned long count = 1;
@@ -1835,7 +1835,7 @@ static const struct {
 
 COMMAND_HANDLER(handle_cortex_m3_vector_catch_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 	struct armv7m_common *armv7m = &cortex_m3->armv7m;
 	struct swjdp_common *swjdp = &armv7m->swjdp_info;
@@ -1892,7 +1892,7 @@ write:
 
 COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 	int retval;
 
diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h
index f5dde5b1..ed083237 100644
--- a/src/target/cortex_m3.h
+++ b/src/target/cortex_m3.h
@@ -164,7 +164,7 @@ struct cortex_m3_common
 };
 
 static inline struct cortex_m3_common *
-target_to_cm3(struct target_s *target)
+target_to_cm3(struct target *target)
 {
 	return container_of(target->arch_info,
 			struct cortex_m3_common, armv7m);
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 21195f7e..e73cb7f3 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -164,7 +164,7 @@ static int embeddedice_get_reg(struct reg *reg)
  * hardware support for vector_catch, single stepping, and monitor mode.
  */
 struct reg_cache *
-embeddedice_build_reg_cache(target_t *target, struct arm7_9_common *arm7_9)
+embeddedice_build_reg_cache(struct target *target, struct arm7_9_common *arm7_9)
 {
 	int retval;
 	struct reg_cache *reg_cache = malloc(sizeof(struct reg_cache));
@@ -300,7 +300,7 @@ embeddedice_build_reg_cache(target_t *target, struct arm7_9_common *arm7_9)
 /**
  * Initialize EmbeddedICE module, if needed.
  */
-int embeddedice_setup(target_t *target)
+int embeddedice_setup(struct target *target)
 {
 	int retval;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 23673f91..3254ed2e 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -93,10 +93,10 @@ struct embeddedice_reg
 	struct arm_jtag *jtag_info;
 };
 
-struct reg_cache* embeddedice_build_reg_cache(target_t *target,
+struct reg_cache* embeddedice_build_reg_cache(struct target *target,
 		struct arm7_9_common *arm7_9);
 
-int embeddedice_setup(target_t *target);
+int embeddedice_setup(struct target *target);
 
 int embeddedice_read_reg(struct reg *reg);
 int embeddedice_read_reg_w_check(struct reg *reg,
diff --git a/src/target/etb.c b/src/target/etb.c
index c1c7f4b1..b6981513 100644
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -351,7 +351,7 @@ static int etb_write_reg(struct reg *reg, uint32_t value)
 
 COMMAND_HANDLER(handle_etb_config_command)
 {
-	target_t *target;
+	struct target *target;
 	struct jtag_tap *tap;
 	struct arm *arm;
 
diff --git a/src/target/etm.c b/src/target/etm.c
index 0aa1a739..cc92098d 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -279,7 +279,7 @@ static void etm_reg_add(unsigned bcd_vers, struct arm_jtag *jtag_info,
 	}
 }
 
-struct reg_cache *etm_build_reg_cache(target_t *target,
+struct reg_cache *etm_build_reg_cache(struct target *target,
 		struct arm_jtag *jtag_info, struct etm_context *etm_ctx)
 {
 	struct reg_cache *reg_cache = malloc(sizeof(struct reg_cache));
@@ -421,7 +421,7 @@ static int etm_store_reg(struct reg *reg)
 	return etm_write_reg(reg, buf_get_u32(reg->value, 0, reg->size));
 }
 
-int etm_setup(target_t *target)
+int etm_setup(struct target *target)
 {
 	int retval;
 	uint32_t etm_ctrl_value;
@@ -1249,7 +1249,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
 
 COMMAND_HANDLER(handle_etm_tracemode_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct arm *arm = target_to_arm(target);
 	struct etm_context *etm;
 
@@ -1371,7 +1371,7 @@ COMMAND_HANDLER(handle_etm_tracemode_command)
 
 COMMAND_HANDLER(handle_etm_config_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	etm_portmode_t portmode = 0x0;
 	struct etm_context *etm_ctx;
@@ -1521,7 +1521,7 @@ COMMAND_HANDLER(handle_etm_config_command)
 
 COMMAND_HANDLER(handle_etm_info_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct etm_context *etm;
 	struct reg *etm_sys_config_reg;
@@ -1653,7 +1653,7 @@ COMMAND_HANDLER(handle_etm_info_command)
 
 COMMAND_HANDLER(handle_etm_status_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct etm_context *etm;
 	trace_status_t trace_status;
@@ -1729,7 +1729,7 @@ COMMAND_HANDLER(handle_etm_status_command)
 
 COMMAND_HANDLER(handle_etm_image_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct etm_context *etm_ctx;
 
@@ -1789,7 +1789,7 @@ COMMAND_HANDLER(handle_etm_image_command)
 COMMAND_HANDLER(handle_etm_dump_command)
 {
 	struct fileio file;
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct etm_context *etm_ctx;
 	uint32_t i;
@@ -1857,7 +1857,7 @@ COMMAND_HANDLER(handle_etm_dump_command)
 COMMAND_HANDLER(handle_etm_load_command)
 {
 	struct fileio file;
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct etm_context *etm_ctx;
 	uint32_t i;
@@ -1940,7 +1940,7 @@ COMMAND_HANDLER(handle_etm_load_command)
 
 COMMAND_HANDLER(handle_etm_trigger_percent_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct etm_context *etm_ctx;
 
@@ -1981,7 +1981,7 @@ COMMAND_HANDLER(handle_etm_trigger_percent_command)
 
 COMMAND_HANDLER(handle_etm_start_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct etm_context *etm_ctx;
 	struct reg *etm_ctrl_reg;
@@ -2029,7 +2029,7 @@ COMMAND_HANDLER(handle_etm_start_command)
 
 COMMAND_HANDLER(handle_etm_stop_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct etm_context *etm_ctx;
 	struct reg *etm_ctrl_reg;
@@ -2068,7 +2068,7 @@ COMMAND_HANDLER(handle_etm_stop_command)
 
 COMMAND_HANDLER(handle_etm_analyze_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct etm_context *etm_ctx;
 	int retval;
diff --git a/src/target/etm.h b/src/target/etm.h
index 531206cc..1ca9b938 100644
--- a/src/target/etm.h
+++ b/src/target/etm.h
@@ -154,7 +154,7 @@ struct etmv1_trace_data
  */
 struct etm_context
 {
-	target_t *target;		/* target this ETM is connected to */
+	struct target *target;		/* target this ETM is connected to */
 	struct reg_cache *reg_cache;		/* ETM register cache */
 	struct etm_capture_driver *capture_driver;	/* driver used to access ETM data */
 	void *capture_driver_priv;	/* capture driver private data */
@@ -207,10 +207,10 @@ typedef enum
 	BR_RSVD7   = 0x7, /* reserved */
 } etmv1_branch_reason_t;
 
-struct reg_cache* etm_build_reg_cache(target_t *target,
+struct reg_cache* etm_build_reg_cache(struct target *target,
 		struct arm_jtag *jtag_info, struct etm_context *etm_ctx);
 
-int etm_setup(target_t *target);
+int etm_setup(struct target *target);
 
 int etm_register_commands(struct command_context_s *cmd_ctx);
 
diff --git a/src/target/etm_dummy.c b/src/target/etm_dummy.c
index eb8377b7..598c7993 100644
--- a/src/target/etm_dummy.c
+++ b/src/target/etm_dummy.c
@@ -27,7 +27,7 @@
 
 COMMAND_HANDLER(handle_etm_dummy_config_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 
 	target = get_target(args[0]);
diff --git a/src/target/fa526.c b/src/target/fa526.c
index d9b89f2a..f3df24fe 100644
--- a/src/target/fa526.c
+++ b/src/target/fa526.c
@@ -34,12 +34,12 @@
 #include "arm920t.h"
 #include "target_type.h"
 
-static void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
+static void fa526_change_to_arm(struct target *target, uint32_t *r0, uint32_t *pc)
 {
 	LOG_ERROR("%s: there is no Thumb state on FA526", __func__);
 }
 
-static void fa526_read_core_regs(target_t *target,
+static void fa526_read_core_regs(struct target *target,
 		uint32_t mask, uint32_t* core_regs[16])
 {
 	int i;
@@ -66,7 +66,7 @@ static void fa526_read_core_regs(target_t *target,
 	}
 }
 
-static void fa526_read_core_regs_target_buffer(target_t *target,
+static void fa526_read_core_regs_target_buffer(struct target *target,
 		uint32_t mask, void* buffer, int size)
 {
 	int i;
@@ -108,7 +108,7 @@ static void fa526_read_core_regs_target_buffer(target_t *target,
 	}
 }
 
-static void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+static void fa526_read_xpsr(struct target *target, uint32_t *xpsr, int spsr)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -133,7 +133,7 @@ static void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0);
 }
 
-static void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+static void fa526_write_xpsr(struct target *target, uint32_t xpsr, int spsr)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -169,7 +169,7 @@ static void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-static void fa526_write_xpsr_im8(target_t *target,
+static void fa526_write_xpsr_im8(struct target *target,
 		uint8_t xpsr_im, int rot, int spsr)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -196,7 +196,7 @@ static void fa526_write_xpsr_im8(target_t *target,
 	}
 }
 
-static void fa526_write_core_regs(target_t *target,
+static void fa526_write_core_regs(struct target *target,
 		uint32_t mask, uint32_t core_regs[16])
 {
 	int i;
@@ -224,7 +224,7 @@ static void fa526_write_core_regs(target_t *target,
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-static void fa526_write_pc(target_t *target, uint32_t pc)
+static void fa526_write_pc(struct target *target, uint32_t pc)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
@@ -250,12 +250,12 @@ static void fa526_write_pc(target_t *target, uint32_t pc)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-static void fa526_branch_resume_thumb(target_t *target)
+static void fa526_branch_resume_thumb(struct target *target)
 {
 	LOG_ERROR("%s: there is no Thumb state on FA526", __func__);
 }
 
-static int fa526_init_arch_info_2(target_t *target,
+static int fa526_init_arch_info_2(struct target *target,
 		struct arm9tdmi_common *arm9tdmi, struct jtag_tap *tap)
 {
 	struct arm7_9_common *arm7_9;
@@ -314,7 +314,7 @@ static int fa526_init_arch_info_2(target_t *target,
 	return ERROR_OK;
 }
 
-static int fa526_init_arch_info(target_t *target,
+static int fa526_init_arch_info(struct target *target,
 		struct arm920t_common *arm920t, struct jtag_tap *tap)
 {
 	struct arm9tdmi_common *arm9tdmi = &arm920t->arm9tdmi_common;
@@ -350,7 +350,7 @@ static int fa526_init_arch_info(target_t *target,
 	return ERROR_OK;
 }
 
-static int fa526_target_create(struct target_s *target, Jim_Interp *interp)
+static int fa526_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm920t_common *arm920t = calloc(1,sizeof(struct arm920t_common));
 
diff --git a/src/target/feroceon.c b/src/target/feroceon.c
index 41769d67..d64b53f5 100644
--- a/src/target/feroceon.c
+++ b/src/target/feroceon.c
@@ -56,7 +56,7 @@
 #include "arm966e.h"
 #include "target_type.h"
 
-int feroceon_assert_reset(target_t *target)
+int feroceon_assert_reset(struct target *target)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -108,7 +108,7 @@ int feroceon_dummy_clock_out(struct arm_jtag *jtag_info, uint32_t instr)
 	return ERROR_OK;
 }
 
-void feroceon_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
+void feroceon_change_to_arm(struct target *target, uint32_t *r0, uint32_t *pc)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -154,7 +154,7 @@ void feroceon_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc)
 	*pc -= (12 + 4);
 }
 
-void feroceon_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16])
+void feroceon_read_core_regs(struct target *target, uint32_t mask, uint32_t* core_regs[16])
 {
 	int i;
 	struct arm *armv4_5 = target->arch_info;
@@ -173,7 +173,7 @@ void feroceon_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_reg
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void feroceon_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size)
+void feroceon_read_core_regs_target_buffer(struct target *target, uint32_t mask, void* buffer, int size)
 {
 	int i;
 	struct arm *armv4_5 = target->arch_info;
@@ -210,7 +210,7 @@ void feroceon_read_core_regs_target_buffer(target_t *target, uint32_t mask, void
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void feroceon_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+void feroceon_read_xpsr(struct target *target, uint32_t *xpsr, int spsr)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -233,7 +233,7 @@ void feroceon_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void feroceon_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+void feroceon_write_xpsr(struct target *target, uint32_t xpsr, int spsr)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -274,7 +274,7 @@ void feroceon_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void feroceon_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
+void feroceon_write_xpsr_im8(struct target *target, uint8_t xpsr_im, int rot, int spsr)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -291,7 +291,7 @@ void feroceon_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int sps
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void feroceon_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16])
+void feroceon_write_core_regs(struct target *target, uint32_t mask, uint32_t core_regs[16])
 {
 	int i;
 	struct arm *armv4_5 = target->arch_info;
@@ -311,7 +311,7 @@ void feroceon_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void feroceon_branch_resume(target_t *target)
+void feroceon_branch_resume(struct target *target)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -326,7 +326,7 @@ void feroceon_branch_resume(target_t *target)
 	arm7_9->need_bypass_before_restart = 1;
 }
 
-void feroceon_branch_resume_thumb(target_t *target)
+void feroceon_branch_resume_thumb(struct target *target)
 {
 	LOG_DEBUG("-");
 
@@ -361,7 +361,7 @@ void feroceon_branch_resume_thumb(target_t *target)
 	arm7_9->need_bypass_before_restart = 1;
 }
 
-int feroceon_read_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+int feroceon_read_cp15(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -383,7 +383,7 @@ int feroceon_read_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t CR
 	return jtag_execute_queue();
 }
 
-int feroceon_write_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+int feroceon_write_cp15(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -402,7 +402,7 @@ int feroceon_write_cp15(target_t *target, uint32_t op1, uint32_t op2, uint32_t C
 	return arm7_9_execute_sys_speed(target);
 }
 
-void feroceon_set_dbgrq(target_t *target)
+void feroceon_set_dbgrq(struct target *target)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -412,7 +412,7 @@ void feroceon_set_dbgrq(target_t *target)
 	embeddedice_store_reg(dbg_ctrl);
 }
 
-void feroceon_enable_single_step(target_t *target, uint32_t next_pc)
+void feroceon_enable_single_step(struct target *target, uint32_t next_pc)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -425,7 +425,7 @@ void feroceon_enable_single_step(target_t *target, uint32_t next_pc)
 	embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], 0xf7);
 }
 
-void feroceon_disable_single_step(target_t *target)
+void feroceon_disable_single_step(struct target *target)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -437,7 +437,7 @@ void feroceon_disable_single_step(target_t *target)
 	embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE]);
 }
 
-int feroceon_examine_debug_reason(target_t *target)
+int feroceon_examine_debug_reason(struct target *target)
 {
 	/* the MOE is not implemented */
 	if (target->debug_reason != DBG_REASON_SINGLESTEP)
@@ -448,7 +448,7 @@ int feroceon_examine_debug_reason(target_t *target)
 	return ERROR_OK;
 }
 
-int feroceon_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer)
+int feroceon_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
 {
 	int retval;
 	struct arm *armv4_5 = target->arch_info;
@@ -577,13 +577,13 @@ int feroceon_bulk_write_memory(target_t *target, uint32_t address, uint32_t coun
 	return retval;
 }
 
-int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+int feroceon_init_target(struct command_context_s *cmd_ctx, struct target *target)
 {
 	arm9tdmi_init_target(cmd_ctx, target);
 	return ERROR_OK;
 }
 
-void feroceon_common_setup(struct target_s *target)
+void feroceon_common_setup(struct target *target)
 {
 	struct arm *armv4_5 = target->arch_info;
 	struct arm7_9_common *arm7_9 = armv4_5->arch_info;
@@ -616,7 +616,7 @@ void feroceon_common_setup(struct target_s *target)
 	arm7_9->wp1_used_default = -1;
 }
 
-int feroceon_target_create(struct target_s *target, Jim_Interp *interp)
+int feroceon_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm926ejs_common *arm926ejs = calloc(1,sizeof(struct arm926ejs_common));
 
@@ -630,7 +630,7 @@ int feroceon_target_create(struct target_s *target, Jim_Interp *interp)
 	return ERROR_OK;
 }
 
-int dragonite_target_create(struct target_s *target, Jim_Interp *interp)
+int dragonite_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct arm966e_common *arm966e = calloc(1,sizeof(struct arm966e_common));
 
@@ -640,7 +640,7 @@ int dragonite_target_create(struct target_s *target, Jim_Interp *interp)
 	return ERROR_OK;
 }
 
-int feroceon_examine(struct target_s *target)
+int feroceon_examine(struct target *target)
 {
 	struct arm *armv4_5;
 	struct arm7_9_common *arm7_9;
diff --git a/src/target/image.c b/src/target/image.c
index 55237f87..bba4675f 100644
--- a/src/target/image.c
+++ b/src/target/image.c
@@ -732,7 +732,7 @@ int image_open(struct image *image, const char *url, const char *type_string)
 	}
 	else if (image->type == IMAGE_MEMORY)
 	{
-		target_t *target = get_target(url);
+		struct target *target = get_target(url);
 
 		if (target == NULL)
 		{
diff --git a/src/target/image.h b/src/target/image.h
index 55f0ea29..06d47bf8 100644
--- a/src/target/image.h
+++ b/src/target/image.h
@@ -80,7 +80,7 @@ struct image_ihex
 
 struct image_memory
 {
-	struct target_s *target;
+	struct target *target;
 	uint8_t *cache;
 	uint32_t cache_address;
 };
diff --git a/src/target/mips32.c b/src/target/mips32.c
index c9ef1380..c6ea66f3 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -99,7 +99,7 @@ int mips32_get_core_reg(struct reg *reg)
 {
 	int retval;
 	struct mips32_core_reg *mips32_reg = reg->arch_info;
-	target_t *target = mips32_reg->target;
+	struct target *target = mips32_reg->target;
 	struct mips32_common *mips32_target = target->arch_info;
 
 	if (target->state != TARGET_HALTED)
@@ -115,7 +115,7 @@ int mips32_get_core_reg(struct reg *reg)
 int mips32_set_core_reg(struct reg *reg, uint8_t *buf)
 {
 	struct mips32_core_reg *mips32_reg = reg->arch_info;
-	target_t *target = mips32_reg->target;
+	struct target *target = mips32_reg->target;
 	uint32_t value = buf_get_u32(buf, 0, 32);
 
 	if (target->state != TARGET_HALTED)
@@ -130,7 +130,7 @@ int mips32_set_core_reg(struct reg *reg, uint8_t *buf)
 	return ERROR_OK;
 }
 
-int mips32_read_core_reg(struct target_s *target, int num)
+int mips32_read_core_reg(struct target *target, int num)
 {
 	uint32_t reg_value;
 	struct mips32_core_reg *mips_core_reg;
@@ -150,7 +150,7 @@ int mips32_read_core_reg(struct target_s *target, int num)
 	return ERROR_OK;
 }
 
-int mips32_write_core_reg(struct target_s *target, int num)
+int mips32_write_core_reg(struct target *target, int num)
 {
 	uint32_t reg_value;
 	struct mips32_core_reg *mips_core_reg;
@@ -171,7 +171,7 @@ int mips32_write_core_reg(struct target_s *target, int num)
 	return ERROR_OK;
 }
 
-int mips32_invalidate_core_regs(target_t *target)
+int mips32_invalidate_core_regs(struct target *target)
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
@@ -186,7 +186,7 @@ int mips32_invalidate_core_regs(target_t *target)
 	return ERROR_OK;
 }
 
-int mips32_get_gdb_reg_list(target_t *target, struct reg **reg_list[], int *reg_list_size)
+int mips32_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size)
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
@@ -210,7 +210,7 @@ int mips32_get_gdb_reg_list(target_t *target, struct reg **reg_list[], int *reg_
 	return ERROR_OK;
 }
 
-int mips32_save_context(target_t *target)
+int mips32_save_context(struct target *target)
 {
 	int i;
 
@@ -232,7 +232,7 @@ int mips32_save_context(target_t *target)
 	return ERROR_OK;
 }
 
-int mips32_restore_context(target_t *target)
+int mips32_restore_context(struct target *target)
 {
 	int i;
 
@@ -254,7 +254,7 @@ int mips32_restore_context(target_t *target)
 	return ERROR_OK;
 }
 
-int mips32_arch_state(struct target_s *target)
+int mips32_arch_state(struct target *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
 
@@ -271,7 +271,7 @@ int mips32_arch_state(struct target_s *target)
 	return ERROR_OK;
 }
 
-struct reg_cache *mips32_build_reg_cache(target_t *target)
+struct reg_cache *mips32_build_reg_cache(struct target *target)
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
@@ -315,7 +315,7 @@ struct reg_cache *mips32_build_reg_cache(target_t *target)
 	return cache;
 }
 
-int mips32_init_arch_info(target_t *target, struct mips32_common *mips32, struct jtag_tap *tap)
+int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, struct jtag_tap *tap)
 {
 	target->arch_info = mips32;
 	mips32->common_magic = MIPS32_COMMON_MAGIC;
@@ -336,13 +336,13 @@ int mips32_register_commands(struct command_context_s *cmd_ctx)
 	return ERROR_OK;
 }
 
-int mips32_run_algorithm(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
+int mips32_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
 {
 	/*TODO*/
 	return ERROR_OK;
 }
 
-int mips32_examine(struct target_s *target)
+int mips32_examine(struct target *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
 
@@ -361,7 +361,7 @@ int mips32_examine(struct target_s *target)
 	return ERROR_OK;
 }
 
-int mips32_configure_break_unit(struct target_s *target)
+int mips32_configure_break_unit(struct target *target)
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
@@ -421,7 +421,7 @@ int mips32_configure_break_unit(struct target_s *target)
 	return ERROR_OK;
 }
 
-int mips32_enable_interrupts(struct target_s *target, int enable)
+int mips32_enable_interrupts(struct target *target, int enable)
 {
 	int retval;
 	int update = 0;
diff --git a/src/target/mips32.h b/src/target/mips32.h
index 3b4f6427..b3e0bc40 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -62,14 +62,14 @@ struct mips32_common
 	struct mips32_comparator *data_break_list;
 
 	/* register cache to processor synchronization */
-	int (*read_core_reg)(struct target_s *target, int num);
-	int (*write_core_reg)(struct target_s *target, int num);
+	int (*read_core_reg)(struct target *target, int num);
+	int (*write_core_reg)(struct target *target, int num);
 };
 
 struct mips32_core_reg
 {
 	uint32_t num;
-	struct target_s *target;
+	struct target *target;
 	struct mips32_common *mips32_common;
 };
 
@@ -124,32 +124,32 @@ struct mips32_core_reg
 #define MIPS32_SDBBP				0x7000003F
 #define MIPS16_SDBBP 				0xE801
 
-int mips32_arch_state(struct target_s *target);
+int mips32_arch_state(struct target *target);
 
-int mips32_init_arch_info(target_t *target,
+int mips32_init_arch_info(struct target *target,
 		struct mips32_common *mips32, struct jtag_tap *tap);
 
-int mips32_restore_context(target_t *target);
-int mips32_save_context(target_t *target);
+int mips32_restore_context(struct target *target);
+int mips32_save_context(struct target *target);
 
-struct reg_cache *mips32_build_reg_cache(target_t *target);
+struct reg_cache *mips32_build_reg_cache(struct target *target);
 
-int mips32_run_algorithm(struct target_s *target,
+int mips32_run_algorithm(struct target *target,
 		int num_mem_params, struct mem_param *mem_params,
 		int num_reg_params, struct reg_param *reg_params,
 		uint32_t entry_point, uint32_t exit_point,
 		int timeout_ms, void *arch_info);
 
-int mips32_configure_break_unit(struct target_s *target);
+int mips32_configure_break_unit(struct target *target);
 
-int mips32_enable_interrupts(struct target_s *target, int enable);
+int mips32_enable_interrupts(struct target *target, int enable);
 
-int mips32_examine(struct target_s *target);
+int mips32_examine(struct target *target);
 
 int mips32_register_commands(struct command_context_s *cmd_ctx);
 
-int mips32_invalidate_core_regs(target_t *target);
-int mips32_get_gdb_reg_list(target_t *target,
+int mips32_invalidate_core_regs(struct target *target);
+int mips32_get_gdb_reg_list(struct target *target,
 		struct reg **reg_list[], int *reg_list_size);
 
 #endif	/*MIPS32_H*/
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 9213ae0c..94a73280 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -32,21 +32,21 @@
 /* cli handling */
 
 /* forward declarations */
-int mips_m4k_poll(target_t *target);
-int mips_m4k_halt(struct target_s *target);
-int mips_m4k_soft_reset_halt(struct target_s *target);
-int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
-int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
-int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int mips_m4k_poll(struct target *target);
+int mips_m4k_halt(struct target *target);
+int mips_m4k_soft_reset_halt(struct target *target);
+int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints);
+int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 int mips_m4k_register_commands(struct command_context_s *cmd_ctx);
-int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp);
+int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target *target);
+int mips_m4k_target_create(struct target *target, Jim_Interp *interp);
 
-int mips_m4k_examine(struct target_s *target);
-int mips_m4k_assert_reset(target_t *target);
-int mips_m4k_deassert_reset(target_t *target);
-int mips_m4k_checksum_memory(target_t *target, uint32_t address, uint32_t size, uint32_t *checksum);
+int mips_m4k_examine(struct target *target);
+int mips_m4k_assert_reset(struct target *target);
+int mips_m4k_deassert_reset(struct target *target);
+int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum);
 
 struct target_type mips_m4k_target =
 {
@@ -86,7 +86,7 @@ struct target_type mips_m4k_target =
 	.examine = mips_m4k_examine,
 };
 
-int mips_m4k_examine_debug_reason(target_t *target)
+int mips_m4k_examine_debug_reason(struct target *target)
 {
 	uint32_t break_status;
 	int retval;
@@ -120,7 +120,7 @@ int mips_m4k_examine_debug_reason(target_t *target)
 	return ERROR_OK;
 }
 
-int mips_m4k_debug_entry(target_t *target)
+int mips_m4k_debug_entry(struct target *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -151,7 +151,7 @@ int mips_m4k_debug_entry(target_t *target)
 	return ERROR_OK;
 }
 
-int mips_m4k_poll(target_t *target)
+int mips_m4k_poll(struct target *target)
 {
 	int retval;
 	struct mips32_common *mips32 = target->arch_info;
@@ -212,7 +212,7 @@ int mips_m4k_poll(target_t *target)
 	return ERROR_OK;
 }
 
-int mips_m4k_halt(struct target_s *target)
+int mips_m4k_halt(struct target *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -257,7 +257,7 @@ int mips_m4k_halt(struct target_s *target)
 	return ERROR_OK;
 }
 
-int mips_m4k_assert_reset(target_t *target)
+int mips_m4k_assert_reset(struct target *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -319,7 +319,7 @@ int mips_m4k_assert_reset(target_t *target)
 	return ERROR_OK;
 }
 
-int mips_m4k_deassert_reset(target_t *target)
+int mips_m4k_deassert_reset(struct target *target)
 {
 	LOG_DEBUG("target->state: %s",
 		target_state_name(target));
@@ -330,13 +330,13 @@ int mips_m4k_deassert_reset(target_t *target)
 	return ERROR_OK;
 }
 
-int mips_m4k_soft_reset_halt(struct target_s *target)
+int mips_m4k_soft_reset_halt(struct target *target)
 {
 	/* TODO */
 	return ERROR_OK;
 }
 
-int mips_m4k_single_step_core(target_t *target)
+int mips_m4k_single_step_core(struct target *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -355,7 +355,7 @@ int mips_m4k_single_step_core(target_t *target)
 	return ERROR_OK;
 }
 
-int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
+int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
 {
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -426,7 +426,7 @@ int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int
 	return ERROR_OK;
 }
 
-int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
+int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
@@ -478,7 +478,7 @@ int mips_m4k_step(struct target_s *target, int current, uint32_t address, int ha
 	return ERROR_OK;
 }
 
-void mips_m4k_enable_breakpoints(struct target_s *target)
+void mips_m4k_enable_breakpoints(struct target *target)
 {
 	struct breakpoint *breakpoint = target->breakpoints;
 
@@ -491,7 +491,7 @@ void mips_m4k_enable_breakpoints(struct target_s *target)
 	}
 }
 
-int mips_m4k_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips32_comparator * comparator_list = mips32->inst_break_list;
@@ -582,7 +582,7 @@ int mips_m4k_set_breakpoint(struct target_s *target, struct breakpoint *breakpoi
 	return ERROR_OK;
 }
 
-int mips_m4k_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
@@ -657,7 +657,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, struct breakpoint *breakp
 	return ERROR_OK;
 }
 
-int mips_m4k_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	struct mips32_common *mips32 = target->arch_info;
 
@@ -677,7 +677,7 @@ int mips_m4k_add_breakpoint(struct target_s *target, struct breakpoint *breakpoi
 	return ERROR_OK;
 }
 
-int mips_m4k_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
@@ -699,7 +699,7 @@ int mips_m4k_remove_breakpoint(struct target_s *target, struct breakpoint *break
 	return ERROR_OK;
 }
 
-int mips_m4k_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips32_comparator * comparator_list = mips32->data_break_list;
@@ -767,7 +767,7 @@ int mips_m4k_set_watchpoint(struct target_s *target, struct watchpoint *watchpoi
 	return ERROR_OK;
 }
 
-int mips_m4k_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
@@ -793,7 +793,7 @@ int mips_m4k_unset_watchpoint(struct target_s *target, struct watchpoint *watchp
 	return ERROR_OK;
 }
 
-int mips_m4k_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	struct mips32_common *mips32 = target->arch_info;
 
@@ -809,7 +809,7 @@ int mips_m4k_add_watchpoint(struct target_s *target, struct watchpoint *watchpoi
 	return ERROR_OK;
 }
 
-int mips_m4k_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
@@ -830,7 +830,7 @@ int mips_m4k_remove_watchpoint(struct target_s *target, struct watchpoint *watch
 	return ERROR_OK;
 }
 
-void mips_m4k_enable_watchpoints(struct target_s *target)
+void mips_m4k_enable_watchpoints(struct target *target)
 {
 	struct watchpoint *watchpoint = target->watchpoints;
 
@@ -843,7 +843,7 @@ void mips_m4k_enable_watchpoints(struct target_s *target)
 	}
 }
 
-int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -875,7 +875,7 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz
 	return ERROR_OK;
 }
 
-int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct mips32_common *mips32 = target->arch_info;
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -910,14 +910,14 @@ int mips_m4k_register_commands(struct command_context_s *cmd_ctx)
 	return retval;
 }
 
-int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target *target)
 {
 	mips32_build_reg_cache(target);
 
 	return ERROR_OK;
 }
 
-int mips_m4k_init_arch_info(target_t *target, struct mips_m4k_common *mips_m4k, struct jtag_tap *tap)
+int mips_m4k_init_arch_info(struct target *target, struct mips_m4k_common *mips_m4k, struct jtag_tap *tap)
 {
 	struct mips32_common *mips32 = &mips_m4k->mips32_common;
 
@@ -930,7 +930,7 @@ int mips_m4k_init_arch_info(target_t *target, struct mips_m4k_common *mips_m4k,
 	return ERROR_OK;
 }
 
-int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp)
+int mips_m4k_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct mips_m4k_common *mips_m4k = calloc(1,sizeof(struct mips_m4k_common));
 
@@ -939,7 +939,7 @@ int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp)
 	return ERROR_OK;
 }
 
-int mips_m4k_examine(struct target_s *target)
+int mips_m4k_examine(struct target *target)
 {
 	int retval;
 	struct mips32_common *mips32 = target->arch_info;
@@ -970,12 +970,12 @@ int mips_m4k_examine(struct target_s *target)
 	return ERROR_OK;
 }
 
-int mips_m4k_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer)
+int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
 {
 	return mips_m4k_write_memory(target, address, 4, count, buffer);
 }
 
-int mips_m4k_checksum_memory(target_t *target, uint32_t address, uint32_t size, uint32_t *checksum)
+int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum)
 {
 	return ERROR_FAIL; /* use bulk read method */
 }
diff --git a/src/target/mips_m4k.h b/src/target/mips_m4k.h
index b13dee2a..a7c5bb39 100644
--- a/src/target/mips_m4k.h
+++ b/src/target/mips_m4k.h
@@ -25,7 +25,7 @@
 
 #include "types.h"
 
-struct target_s;
+struct target;
 
 #define MIPSM4K_COMMON_MAGIC	0xB321B321
 
@@ -35,19 +35,19 @@ struct mips_m4k_common
 	struct mips32_common mips32_common;
 };
 
-int mips_m4k_bulk_write_memory(struct target_s *target,
+int mips_m4k_bulk_write_memory(struct target *target,
 		uint32_t address, uint32_t count, uint8_t *buffer);
 
-void mips_m4k_enable_breakpoints(struct target_s *target);
-int mips_m4k_set_breakpoint(struct target_s *target, struct breakpoint *bp);
-int mips_m4k_unset_breakpoint(struct target_s *target, struct breakpoint *bp);
-int mips_m4k_add_breakpoint(struct target_s *target, struct breakpoint *bp);
-int mips_m4k_remove_breakpoint(struct target_s *target, struct breakpoint *bp);
-
-void mips_m4k_enable_watchpoints(struct target_s *target);
-int mips_m4k_set_watchpoint(struct target_s *target, struct watchpoint *wp);
-int mips_m4k_unset_watchpoint(struct target_s *target, struct watchpoint *wp);
-int mips_m4k_add_watchpoint(struct target_s *target, struct watchpoint *wp);
-int mips_m4k_remove_watchpoint(struct target_s *target, struct watchpoint *wp);
+void mips_m4k_enable_breakpoints(struct target *target);
+int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *bp);
+int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *bp);
+int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *bp);
+int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *bp);
+
+void mips_m4k_enable_watchpoints(struct target *target);
+int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *wp);
+int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *wp);
+int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *wp);
+int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *wp);
 
 #endif	/*MIPS_M4K_H*/
diff --git a/src/target/oocd_trace.c b/src/target/oocd_trace.c
index 6011b682..390c75d8 100644
--- a/src/target/oocd_trace.c
+++ b/src/target/oocd_trace.c
@@ -291,7 +291,7 @@ struct etm_capture_driver oocd_trace_capture_driver =
 
 COMMAND_HANDLER(handle_oocd_trace_config_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 
 	if (argc != 2)
@@ -328,7 +328,7 @@ COMMAND_HANDLER(handle_oocd_trace_config_command)
 
 COMMAND_HANDLER(handle_oocd_trace_status_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct oocd_trace *oocd_trace;
 	uint32_t status;
@@ -368,7 +368,7 @@ COMMAND_HANDLER(handle_oocd_trace_status_command)
 
 COMMAND_HANDLER(handle_oocd_trace_resync_command)
 {
-	target_t *target;
+	struct target *target;
 	struct arm *arm;
 	struct oocd_trace *oocd_trace;
 	size_t bytes_written;
diff --git a/src/target/register.h b/src/target/register.h
index ca8866b1..a907dc27 100644
--- a/src/target/register.h
+++ b/src/target/register.h
@@ -25,7 +25,7 @@
 
 #include "types.h"
 
-struct target_s;
+struct target;
 
 struct bitfield_desc
 {
diff --git a/src/target/target.c b/src/target/target.c
index 0cba285b..ca440a7d 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -45,8 +45,8 @@
 
 static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv);
 
-static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv);
-static int target_mem2array(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv);
+static int target_array2mem(Jim_Interp *interp, struct target *target, int argc, Jim_Obj *const *argv);
+static int target_mem2array(Jim_Interp *interp, struct target *target, int argc, Jim_Obj *const *argv);
 
 /* targets */
 extern struct target_type arm7tdmi_target;
@@ -85,7 +85,7 @@ struct target_type *target_types[] =
 	NULL,
 };
 
-target_t *all_targets = NULL;
+struct target *all_targets = NULL;
 struct target_event_callback *target_event_callbacks = NULL;
 struct target_timer_callback *target_timer_callbacks = NULL;
 
@@ -213,7 +213,7 @@ const Jim_Nvp nvp_reset_modes[] = {
 };
 
 const char *
-target_state_name( target_t *t )
+target_state_name( struct target *t )
 {
 	const char *cp;
 	cp = Jim_Nvp_value2name_simple(nvp_target_state, t->state)->name;
@@ -227,7 +227,7 @@ target_state_name( target_t *t )
 /* determine the number of the new target */
 static int new_target_number(void)
 {
-	target_t *t;
+	struct target *t;
 	int x;
 
 	/* number is 0 based */
@@ -243,7 +243,7 @@ static int new_target_number(void)
 }
 
 /* read a uint32_t from a buffer in target memory endianness */
-uint32_t target_buffer_get_u32(target_t *target, const uint8_t *buffer)
+uint32_t target_buffer_get_u32(struct target *target, const uint8_t *buffer)
 {
 	if (target->endianness == TARGET_LITTLE_ENDIAN)
 		return le_to_h_u32(buffer);
@@ -252,7 +252,7 @@ uint32_t target_buffer_get_u32(target_t *target, const uint8_t *buffer)
 }
 
 /* read a uint16_t from a buffer in target memory endianness */
-uint16_t target_buffer_get_u16(target_t *target, const uint8_t *buffer)
+uint16_t target_buffer_get_u16(struct target *target, const uint8_t *buffer)
 {
 	if (target->endianness == TARGET_LITTLE_ENDIAN)
 		return le_to_h_u16(buffer);
@@ -261,13 +261,13 @@ uint16_t target_buffer_get_u16(target_t *target, const uint8_t *buffer)
 }
 
 /* read a uint8_t from a buffer in target memory endianness */
-uint8_t target_buffer_get_u8(target_t *target, const uint8_t *buffer)
+uint8_t target_buffer_get_u8(struct target *target, const uint8_t *buffer)
 {
 	return *buffer & 0x0ff;
 }
 
 /* write a uint32_t to a buffer in target memory endianness */
-void target_buffer_set_u32(target_t *target, uint8_t *buffer, uint32_t value)
+void target_buffer_set_u32(struct target *target, uint8_t *buffer, uint32_t value)
 {
 	if (target->endianness == TARGET_LITTLE_ENDIAN)
 		h_u32_to_le(buffer, value);
@@ -276,7 +276,7 @@ void target_buffer_set_u32(target_t *target, uint8_t *buffer, uint32_t value)
 }
 
 /* write a uint16_t to a buffer in target memory endianness */
-void target_buffer_set_u16(target_t *target, uint8_t *buffer, uint16_t value)
+void target_buffer_set_u16(struct target *target, uint8_t *buffer, uint16_t value)
 {
 	if (target->endianness == TARGET_LITTLE_ENDIAN)
 		h_u16_to_le(buffer, value);
@@ -285,15 +285,15 @@ void target_buffer_set_u16(target_t *target, uint8_t *buffer, uint16_t value)
 }
 
 /* write a uint8_t to a buffer in target memory endianness */
-void target_buffer_set_u8(target_t *target, uint8_t *buffer, uint8_t value)
+void target_buffer_set_u8(struct target *target, uint8_t *buffer, uint8_t value)
 {
 	*buffer = value;
 }
 
 /* return a pointer to a configured target; id is name or number */
-target_t *get_target(const char *id)
+struct target *get_target(const char *id)
 {
-	target_t *target;
+	struct target *target;
 
 	/* try as tcltarget name */
 	for (target = all_targets; target; target = target->next) {
@@ -322,9 +322,9 @@ target_t *get_target(const char *id)
 }
 
 /* returns a pointer to the n-th configured target */
-static target_t *get_target_by_num(int num)
+static struct target *get_target_by_num(int num)
 {
-	target_t *target = all_targets;
+	struct target *target = all_targets;
 
 	while (target) {
 		if (target->target_number == num) {
@@ -336,9 +336,9 @@ static target_t *get_target_by_num(int num)
 	return NULL;
 }
 
-target_t* get_current_target(command_context_t *cmd_ctx)
+struct target* get_current_target(command_context_t *cmd_ctx)
 {
-	target_t *target = get_target_by_num(cmd_ctx->current_target);
+	struct target *target = get_target_by_num(cmd_ctx->current_target);
 
 	if (target == NULL)
 	{
@@ -349,7 +349,7 @@ target_t* get_current_target(command_context_t *cmd_ctx)
 	return target;
 }
 
-int target_poll(struct target_s *target)
+int target_poll(struct target *target)
 {
 	int retval;
 
@@ -384,7 +384,7 @@ int target_poll(struct target_s *target)
 	return ERROR_OK;
 }
 
-int target_halt(struct target_s *target)
+int target_halt(struct target *target)
 {
 	int retval;
 	/* We can't poll until after examine */
@@ -404,7 +404,7 @@ int target_halt(struct target_s *target)
 	return ERROR_OK;
 }
 
-int target_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
+int target_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
 {
 	int retval;
 
@@ -460,33 +460,33 @@ int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mo
 	return retval;
 }
 
-static int identity_virt2phys(struct target_s *target,
+static int identity_virt2phys(struct target *target,
 		uint32_t virtual, uint32_t *physical)
 {
 	*physical = virtual;
 	return ERROR_OK;
 }
 
-static int no_mmu(struct target_s *target, int *enabled)
+static int no_mmu(struct target *target, int *enabled)
 {
 	*enabled = 0;
 	return ERROR_OK;
 }
 
-static int default_examine(struct target_s *target)
+static int default_examine(struct target *target)
 {
 	target_set_examined(target);
 	return ERROR_OK;
 }
 
-int target_examine_one(struct target_s *target)
+int target_examine_one(struct target *target)
 {
 	return target->type->examine(target);
 }
 
 static int jtag_enable_callback(enum jtag_event event, void *priv)
 {
-	target_t *target = priv;
+	struct target *target = priv;
 
 	if (event != JTAG_TAP_EVENT_ENABLE || !target->tap->enabled)
 		return ERROR_OK;
@@ -504,7 +504,7 @@ static int jtag_enable_callback(enum jtag_event event, void *priv)
 int target_examine(void)
 {
 	int retval = ERROR_OK;
-	target_t *target;
+	struct target *target;
 
 	for (target = all_targets; target; target = target->next)
 	{
@@ -519,12 +519,12 @@ int target_examine(void)
 	}
 	return retval;
 }
-const char *target_get_name(struct target_s *target)
+const char *target_get_name(struct target *target)
 {
 	return target->type->name;
 }
 
-static int target_write_memory_imp(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+static int target_write_memory_imp(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	if (!target_was_examined(target))
 	{
@@ -534,7 +534,7 @@ static int target_write_memory_imp(struct target_s *target, uint32_t address, ui
 	return target->type->write_memory_imp(target, address, size, count, buffer);
 }
 
-static int target_read_memory_imp(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+static int target_read_memory_imp(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	if (!target_was_examined(target))
 	{
@@ -544,7 +544,7 @@ static int target_read_memory_imp(struct target_s *target, uint32_t address, uin
 	return target->type->read_memory_imp(target, address, size, count, buffer);
 }
 
-static int target_soft_reset_halt_imp(struct target_s *target)
+static int target_soft_reset_halt_imp(struct target *target)
 {
 	if (!target_was_examined(target))
 	{
@@ -559,7 +559,7 @@ static int target_soft_reset_halt_imp(struct target_s *target)
 	return target->type->soft_reset_halt_imp(target);
 }
 
-static int target_run_algorithm_imp(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
+static int target_run_algorithm_imp(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
 {
 	if (!target_was_examined(target))
 	{
@@ -569,71 +569,71 @@ static int target_run_algorithm_imp(struct target_s *target, int num_mem_params,
 	return target->type->run_algorithm_imp(target, num_mem_params, mem_params, num_reg_params, reg_param, entry_point, exit_point, timeout_ms, arch_info);
 }
 
-int target_read_memory(struct target_s *target,
+int target_read_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	return target->type->read_memory(target, address, size, count, buffer);
 }
 
-int target_read_phys_memory(struct target_s *target,
+int target_read_phys_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	return target->type->read_phys_memory(target, address, size, count, buffer);
 }
 
-int target_write_memory(struct target_s *target,
+int target_write_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	return target->type->write_memory(target, address, size, count, buffer);
 }
 
-int target_write_phys_memory(struct target_s *target,
+int target_write_phys_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	return target->type->write_phys_memory(target, address, size, count, buffer);
 }
 
-int target_bulk_write_memory(struct target_s *target,
+int target_bulk_write_memory(struct target *target,
 		uint32_t address, uint32_t count, uint8_t *buffer)
 {
 	return target->type->bulk_write_memory(target, address, count, buffer);
 }
 
-int target_add_breakpoint(struct target_s *target,
+int target_add_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	return target->type->add_breakpoint(target, breakpoint);
 }
-int target_remove_breakpoint(struct target_s *target,
+int target_remove_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	return target->type->remove_breakpoint(target, breakpoint);
 }
 
-int target_add_watchpoint(struct target_s *target,
+int target_add_watchpoint(struct target *target,
 		struct watchpoint *watchpoint)
 {
 	return target->type->add_watchpoint(target, watchpoint);
 }
-int target_remove_watchpoint(struct target_s *target,
+int target_remove_watchpoint(struct target *target,
 		struct watchpoint *watchpoint)
 {
 	return target->type->remove_watchpoint(target, watchpoint);
 }
 
-int target_get_gdb_reg_list(struct target_s *target,
+int target_get_gdb_reg_list(struct target *target,
 		struct reg **reg_list[], int *reg_list_size)
 {
 	return target->type->get_gdb_reg_list(target, reg_list, reg_list_size);
 }
-int target_step(struct target_s *target,
+int target_step(struct target *target,
 		int current, uint32_t address, int handle_breakpoints)
 {
 	return target->type->step(target, current, address, handle_breakpoints);
 }
 
 
-int target_run_algorithm(struct target_s *target,
+int target_run_algorithm(struct target *target,
 		int num_mem_params, struct mem_param *mem_params,
 		int num_reg_params, struct reg_param *reg_param,
 		uint32_t entry_point, uint32_t exit_point,
@@ -645,36 +645,36 @@ int target_run_algorithm(struct target_s *target,
 }
 
 /// @returns @c true if the target has been examined.
-bool target_was_examined(struct target_s *target)
+bool target_was_examined(struct target *target)
 {
 	return target->type->examined;
 }
 /// Sets the @c examined flag for the given target.
-void target_set_examined(struct target_s *target)
+void target_set_examined(struct target *target)
 {
 	target->type->examined = true;
 }
 // Reset the @c examined flag for the given target.
-void target_reset_examined(struct target_s *target)
+void target_reset_examined(struct target *target)
 {
 	target->type->examined = false;
 }
 
 
 
-static int default_mrc(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int default_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	LOG_ERROR("Not implemented: %s", __func__);
 	return ERROR_FAIL;
 }
 
-static int default_mcr(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int default_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	LOG_ERROR("Not implemented: %s", __func__);
 	return ERROR_FAIL;
 }
 
-static int arm_cp_check(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm)
+static int arm_cp_check(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm)
 {
 	/* basic check */
 	if (!target_was_examined(target))
@@ -716,7 +716,7 @@ static int arm_cp_check(struct target_s *target, int cpnum, uint32_t op1, uint32
 	return ERROR_OK;
 }
 
-int target_mrc(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+int target_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
 {
 	int retval;
 
@@ -727,7 +727,7 @@ int target_mrc(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, u
 	return target->type->mrc(target, cpnum, op1, op2, CRn, CRm, value);
 }
 
-int target_mcr(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+int target_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
 {
 	int retval;
 
@@ -739,7 +739,7 @@ int target_mcr(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, u
 }
 
 static int
-err_read_phys_memory(struct target_s *target, uint32_t address,
+err_read_phys_memory(struct target *target, uint32_t address,
 		uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	LOG_ERROR("Not implemented: %s", __func__);
@@ -747,7 +747,7 @@ err_read_phys_memory(struct target_s *target, uint32_t address,
 }
 
 static int
-err_write_phys_memory(struct target_s *target, uint32_t address,
+err_write_phys_memory(struct target *target, uint32_t address,
 		uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	LOG_ERROR("Not implemented: %s", __func__);
@@ -756,7 +756,7 @@ err_write_phys_memory(struct target_s *target, uint32_t address,
 
 int target_init(struct command_context_s *cmd_ctx)
 {
-	struct target_s *target;
+	struct target *target;
 	int retval;
 
 	for (target = all_targets; target; target = target->next) {
@@ -870,7 +870,7 @@ int target_init(struct command_context_s *cmd_ctx)
 	return ERROR_OK;
 }
 
-int target_register_event_callback(int (*callback)(struct target_s *target, enum target_event event, void *priv), void *priv)
+int target_register_event_callback(int (*callback)(struct target *target, enum target_event event, void *priv), void *priv)
 {
 	struct target_event_callback **callbacks_p = &target_event_callbacks;
 
@@ -932,7 +932,7 @@ int target_register_timer_callback(int (*callback)(void *priv), int time_ms, int
 	return ERROR_OK;
 }
 
-int target_unregister_event_callback(int (*callback)(struct target_s *target, enum target_event event, void *priv), void *priv)
+int target_unregister_event_callback(int (*callback)(struct target *target, enum target_event event, void *priv), void *priv)
 {
 	struct target_event_callback **p = &target_event_callbacks;
 	struct target_event_callback *c = target_event_callbacks;
@@ -986,7 +986,7 @@ int target_unregister_timer_callback(int (*callback)(void *priv), void *priv)
 	return ERROR_OK;
 }
 
-int target_call_event_callbacks(target_t *target, enum target_event event)
+int target_call_event_callbacks(struct target *target, enum target_event event)
 {
 	struct target_event_callback *callback = target_event_callbacks;
 	struct target_event_callback *next_callback;
@@ -1082,7 +1082,7 @@ int target_call_timer_callbacks_now(void)
 	return target_call_timer_callbacks_check_time(0);
 }
 
-int target_alloc_working_area(struct target_s *target, uint32_t size, struct working_area **area)
+int target_alloc_working_area(struct target *target, uint32_t size, struct working_area **area)
 {
 	struct working_area *c = target->working_areas;
 	struct working_area *new_wa = NULL;
@@ -1202,7 +1202,7 @@ int target_alloc_working_area(struct target_s *target, uint32_t size, struct wor
 	return ERROR_OK;
 }
 
-int target_free_working_area_restore(struct target_s *target, struct working_area *area, int restore)
+int target_free_working_area_restore(struct target *target, struct working_area *area, int restore)
 {
 	if (area->free)
 		return ERROR_OK;
@@ -1223,7 +1223,7 @@ int target_free_working_area_restore(struct target_s *target, struct working_are
 	return ERROR_OK;
 }
 
-int target_free_working_area(struct target_s *target, struct working_area *area)
+int target_free_working_area(struct target *target, struct working_area *area)
 {
 	return target_free_working_area_restore(target, area, 1);
 }
@@ -1231,7 +1231,7 @@ int target_free_working_area(struct target_s *target, struct working_area *area)
 /* free resources and restore memory, if restoring memory fails,
  * free up resources anyway
  */
-void target_free_all_working_areas_restore(struct target_s *target, int restore)
+void target_free_all_working_areas_restore(struct target *target, int restore)
 {
 	struct working_area *c = target->working_areas;
 
@@ -1251,12 +1251,12 @@ void target_free_all_working_areas_restore(struct target_s *target, int restore)
 	target->working_areas = NULL;
 }
 
-void target_free_all_working_areas(struct target_s *target)
+void target_free_all_working_areas(struct target *target)
 {
 	target_free_all_working_areas_restore(target, 1);
 }
 
-int target_arch_state(struct target_s *target)
+int target_arch_state(struct target *target)
 {
 	int retval;
 	if (target == NULL)
@@ -1278,7 +1278,7 @@ int target_arch_state(struct target_s *target)
  * mode respectively, otherwise data is handled as quickly as
  * possible
  */
-int target_write_buffer(struct target_s *target, uint32_t address, uint32_t size, uint8_t *buffer)
+int target_write_buffer(struct target *target, uint32_t address, uint32_t size, uint8_t *buffer)
 {
 	int retval;
 	LOG_DEBUG("writing buffer of %i byte at 0x%8.8x",
@@ -1360,7 +1360,7 @@ int target_write_buffer(struct target_s *target, uint32_t address, uint32_t size
  * mode respectively, otherwise data is handled as quickly as
  * possible
  */
-int target_read_buffer(struct target_s *target, uint32_t address, uint32_t size, uint8_t *buffer)
+int target_read_buffer(struct target *target, uint32_t address, uint32_t size, uint8_t *buffer)
 {
 	int retval;
 	LOG_DEBUG("reading buffer of %i byte at 0x%8.8x",
@@ -1441,7 +1441,7 @@ int target_read_buffer(struct target_s *target, uint32_t address, uint32_t size,
 	return ERROR_OK;
 }
 
-int target_checksum_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t* crc)
+int target_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t* crc)
 {
 	uint8_t *buffer;
 	int retval;
@@ -1486,7 +1486,7 @@ int target_checksum_memory(struct target_s *target, uint32_t address, uint32_t s
 	return retval;
 }
 
-int target_blank_check_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t* blank)
+int target_blank_check_memory(struct target *target, uint32_t address, uint32_t size, uint32_t* blank)
 {
 	int retval;
 	if (!target_was_examined(target))
@@ -1503,7 +1503,7 @@ int target_blank_check_memory(struct target_s *target, uint32_t address, uint32_
 	return retval;
 }
 
-int target_read_u32(struct target_s *target, uint32_t address, uint32_t *value)
+int target_read_u32(struct target *target, uint32_t address, uint32_t *value)
 {
 	uint8_t value_buf[4];
 	if (!target_was_examined(target))
@@ -1531,7 +1531,7 @@ int target_read_u32(struct target_s *target, uint32_t address, uint32_t *value)
 	return retval;
 }
 
-int target_read_u16(struct target_s *target, uint32_t address, uint16_t *value)
+int target_read_u16(struct target *target, uint32_t address, uint16_t *value)
 {
 	uint8_t value_buf[2];
 	if (!target_was_examined(target))
@@ -1559,7 +1559,7 @@ int target_read_u16(struct target_s *target, uint32_t address, uint16_t *value)
 	return retval;
 }
 
-int target_read_u8(struct target_s *target, uint32_t address, uint8_t *value)
+int target_read_u8(struct target *target, uint32_t address, uint8_t *value)
 {
 	int retval = target_read_memory(target, address, 1, 1, value);
 	if (!target_was_examined(target))
@@ -1584,7 +1584,7 @@ int target_read_u8(struct target_s *target, uint32_t address, uint8_t *value)
 	return retval;
 }
 
-int target_write_u32(struct target_s *target, uint32_t address, uint32_t value)
+int target_write_u32(struct target *target, uint32_t address, uint32_t value)
 {
 	int retval;
 	uint8_t value_buf[4];
@@ -1607,7 +1607,7 @@ int target_write_u32(struct target_s *target, uint32_t address, uint32_t value)
 	return retval;
 }
 
-int target_write_u16(struct target_s *target, uint32_t address, uint16_t value)
+int target_write_u16(struct target *target, uint32_t address, uint16_t value)
 {
 	int retval;
 	uint8_t value_buf[2];
@@ -1630,7 +1630,7 @@ int target_write_u16(struct target_s *target, uint32_t address, uint16_t value)
 	return retval;
 }
 
-int target_write_u8(struct target_s *target, uint32_t address, uint8_t value)
+int target_write_u8(struct target *target, uint32_t address, uint8_t value)
 {
 	int retval;
 	if (!target_was_examined(target))
@@ -1652,7 +1652,7 @@ int target_write_u8(struct target_s *target, uint32_t address, uint8_t value)
 
 COMMAND_HANDLER(handle_targets_command)
 {
-	target_t *target = all_targets;
+	struct target *target = all_targets;
 
 	if (argc == 1)
 	{
@@ -1774,7 +1774,7 @@ static int sense_handler(void)
 }
 
 static void target_call_event_callbacks_all(enum target_event e) {
-	target_t *target;
+	struct target *target;
 	target = all_targets;
 	while (target) {
 		target_call_event_callbacks(target, e);
@@ -1840,7 +1840,7 @@ int handle_target(void *priv)
 	/* Poll targets for state changes unless that's globally disabled.
 	 * Skip targets that are currently disabled.
 	 */
-	for (target_t *target = all_targets;
+	for (struct target *target = all_targets;
 			is_jtag_poll_safe() && target;
 			target = target->next)
 	{
@@ -1864,7 +1864,7 @@ int handle_target(void *priv)
 
 COMMAND_HANDLER(handle_reg_command)
 {
-	target_t *target;
+	struct target *target;
 	struct reg *reg = NULL;
 	int count = 0;
 	char *value;
@@ -1996,7 +1996,7 @@ COMMAND_HANDLER(handle_reg_command)
 COMMAND_HANDLER(handle_poll_command)
 {
 	int retval = ERROR_OK;
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 
 	if (argc == 0)
 	{
@@ -2053,7 +2053,7 @@ COMMAND_HANDLER(handle_wait_halt_command)
 		ms *= 1000;
 	}
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	return target_wait_state(target, TARGET_HALTED, ms);
 }
 
@@ -2063,7 +2063,7 @@ COMMAND_HANDLER(handle_wait_halt_command)
  *
  * After 500ms, keep_alive() is invoked
  */
-int target_wait_state(target_t *target, enum target_state state, int ms)
+int target_wait_state(struct target *target, enum target_state state, int ms)
 {
 	int retval;
 	long long then = 0, cur;
@@ -2106,7 +2106,7 @@ COMMAND_HANDLER(handle_halt_command)
 {
 	LOG_DEBUG("-");
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	int retval = target_halt(target);
 	if (ERROR_OK != retval)
 		return retval;
@@ -2126,7 +2126,7 @@ COMMAND_HANDLER(handle_halt_command)
 
 COMMAND_HANDLER(handle_soft_reset_halt_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 
 	LOG_USER("requesting target halt and executing a soft reset");
 
@@ -2162,7 +2162,7 @@ COMMAND_HANDLER(handle_resume_command)
 	if (argc > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	target_handle_event(target, TARGET_EVENT_OLD_pre_resume);
 
 	/* with no args, resume from current pc, addr = 0,
@@ -2196,13 +2196,13 @@ COMMAND_HANDLER(handle_step_command)
 		current_pc = 0;
 	}
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 
 	return target->type->step(target, current_pc, addr, 1);
 }
 
 static void handle_md_output(struct command_context_s *cmd_ctx,
-		struct target_s *target, uint32_t address, unsigned size,
+		struct target *target, uint32_t address, unsigned size,
 		unsigned count, const uint8_t *buffer)
 {
 	const unsigned line_bytecnt = 32;
@@ -2264,7 +2264,7 @@ COMMAND_HANDLER(handle_md_command)
 	}
 
 	bool physical=strcmp(args[0], "phys")==0;
-	int (*fn)(struct target_s *target,
+	int (*fn)(struct target *target,
 			uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 	if (physical)
 	{
@@ -2289,7 +2289,7 @@ COMMAND_HANDLER(handle_md_command)
 
 	uint8_t *buffer = calloc(count, size);
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	int retval = fn(target, address, size, count, buffer);
 	if (ERROR_OK == retval)
 		handle_md_output(cmd_ctx, target, address, size, count, buffer);
@@ -2306,7 +2306,7 @@ COMMAND_HANDLER(handle_mw_command)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 	bool physical=strcmp(args[0], "phys")==0;
-	int (*fn)(struct target_s *target,
+	int (*fn)(struct target *target,
 			uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 	if (physical)
 	{
@@ -2330,7 +2330,7 @@ COMMAND_HANDLER(handle_mw_command)
 	if (argc == 3)
 		COMMAND_PARSE_NUMBER(uint, args[2], count);
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	unsigned wordsize;
 	uint8_t value_buf[4];
 	switch (CMD_NAME[2])
@@ -2415,7 +2415,7 @@ COMMAND_HANDLER(handle_load_image_command)
 	if (ERROR_OK != retval)
 		return retval;
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 
 	struct duration bench;
 	duration_start(&bench);
@@ -2499,7 +2499,7 @@ COMMAND_HANDLER(handle_dump_image_command)
 	int retvaltemp;
 
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 
 	if (argc != 3)
 	{
@@ -2566,7 +2566,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify)
 
 	struct image image;
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 
 	if (argc < 1)
 	{
@@ -2711,7 +2711,7 @@ COMMAND_HANDLER(handle_test_image_command)
 
 static int handle_bp_command_list(struct command_context_s *cmd_ctx)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct breakpoint *breakpoint = target->breakpoints;
 	while (breakpoint)
 	{
@@ -2740,7 +2740,7 @@ static int handle_bp_command_list(struct command_context_s *cmd_ctx)
 static int handle_bp_command_set(struct command_context_s *cmd_ctx,
 		uint32_t addr, uint32_t length, int hw)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	int retval = breakpoint_add(target, addr, length, hw);
 	if (ERROR_OK == retval)
 		command_print(cmd_ctx, "breakpoint set at 0x%8.8" PRIx32 "", addr);
@@ -2785,7 +2785,7 @@ COMMAND_HANDLER(handle_rbp_command)
 	uint32_t addr;
 	COMMAND_PARSE_NUMBER(u32, args[0], addr);
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	breakpoint_remove(target, addr);
 
 	return ERROR_OK;
@@ -2793,7 +2793,7 @@ COMMAND_HANDLER(handle_rbp_command)
 
 COMMAND_HANDLER(handle_wp_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 
 	if (argc == 0)
 	{
@@ -2871,7 +2871,7 @@ COMMAND_HANDLER(handle_rwp_command)
 	uint32_t addr;
 	COMMAND_PARSE_NUMBER(u32, args[0], addr);
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	watchpoint_remove(target, addr);
 
 	return ERROR_OK;
@@ -2893,7 +2893,7 @@ COMMAND_HANDLER(handle_virt2phys_command)
 	COMMAND_PARSE_NUMBER(u32, args[0], va);
 	uint32_t pa;
 
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	int retval = target->type->virt2phys(target, va, &pa);
 	if (retval == ERROR_OK)
 		command_print(cmd_ctx, "Physical address 0x%08" PRIx32 "", pa);
@@ -3020,7 +3020,7 @@ static void writeGmon(uint32_t *samples, uint32_t sampleNum, const char *filenam
 /* profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC */
 COMMAND_HANDLER(handle_profile_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct timeval timeout, now;
 
 	gettimeofday(&timeout, NULL);
@@ -3133,7 +3133,7 @@ static int new_int_array_element(Jim_Interp * interp, const char *varname, int i
 static int jim_mem2array(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 {
 	command_context_t *context;
-	target_t *target;
+	struct target *target;
 
 	context = Jim_GetAssocData(interp, "context");
 	if (context == NULL)
@@ -3151,7 +3151,7 @@ static int jim_mem2array(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 	return 	target_mem2array(interp, target, argc-1, argv + 1);
 }
 
-static int target_mem2array(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv)
+static int target_mem2array(Jim_Interp *interp, struct target *target, int argc, Jim_Obj *const *argv)
 {
 	long l;
 	uint32_t width;
@@ -3322,7 +3322,7 @@ static int get_int_array_element(Jim_Interp * interp, const char *varname, int i
 static int jim_array2mem(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 {
 	command_context_t *context;
-	target_t *target;
+	struct target *target;
 
 	context = Jim_GetAssocData(interp, "context");
 	if (context == NULL) {
@@ -3337,7 +3337,7 @@ static int jim_array2mem(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 
 	return target_array2mem(interp,target, argc-1, argv + 1);
 }
-static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_Obj *const *argv)
+static int target_array2mem(Jim_Interp *interp, struct target *target, int argc, Jim_Obj *const *argv)
 {
 	long l;
 	uint32_t width;
@@ -3476,7 +3476,7 @@ static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_
 
 void target_all_handle_event(enum target_event e)
 {
-	target_t *target;
+	struct target *target;
 
 	LOG_DEBUG("**all*targets: event: %d, %s",
 			   (int)e,
@@ -3493,7 +3493,7 @@ void target_all_handle_event(enum target_event e)
 /* FIX? should we propagate errors here rather than printing them
  * and continuing?
  */
-void target_handle_event(target_t *target, enum target_event e)
+void target_handle_event(struct target *target, enum target_event e)
 {
 	struct target_event_action *teap;
 
@@ -3540,7 +3540,7 @@ static Jim_Nvp nvp_config_opts[] = {
 	{ .name = NULL, .value = -1 }
 };
 
-static int target_configure(Jim_GetOptInfo *goi, target_t *target)
+static int target_configure(Jim_GetOptInfo *goi, struct target *target)
 {
 	Jim_Nvp *n;
 	Jim_Obj *o;
@@ -3821,7 +3821,7 @@ static int tcl_target_func(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 	int x,y,z;
 	uint8_t  target_buf[32];
 	Jim_Nvp *n;
-	target_t *target;
+	struct target *target;
 	struct command_context_s *cmd_ctx;
 	int e;
 
@@ -4237,7 +4237,7 @@ static int target_create(Jim_GetOptInfo *goi)
 	char *cp2;
 	int e;
 	int x;
-	target_t *target;
+	struct target *target;
 	struct command_context_s *cmd_ctx;
 
 	cmd_ctx = Jim_GetAssocData(goi->interp, "context");
@@ -4285,7 +4285,7 @@ static int target_create(Jim_GetOptInfo *goi)
 	}
 
 	/* Create it */
-	target = calloc(1,sizeof(target_t));
+	target = calloc(1,sizeof(struct target));
 	/* set target number */
 	target->target_number = new_target_number();
 
@@ -4364,7 +4364,7 @@ static int target_create(Jim_GetOptInfo *goi)
 
 	/* append to end of list */
 	{
-		target_t **tpp;
+		struct target **tpp;
 		tpp = &(all_targets);
 		while (*tpp) {
 			tpp = &((*tpp)->next);
@@ -4391,7 +4391,7 @@ static int jim_target(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 	int x,r,e;
 	jim_wide w;
 	struct command_context_s *cmd_ctx;
-	target_t *target;
+	struct target *target;
 	Jim_GetOptInfo goi;
 	enum tcmd {
 		/* TG = target generic */
@@ -4662,7 +4662,7 @@ COMMAND_HANDLER(handle_fast_load_command)
 	int retval = ERROR_OK;
 	for (i = 0; i < fastload_num;i++)
 	{
-		target_t *target = get_current_target(cmd_ctx);
+		struct target *target = get_current_target(cmd_ctx);
 		command_print(cmd_ctx, "Write to 0x%08x, length 0x%08x",
 					  (unsigned int)(fastload[i].address),
 					  (unsigned int)(fastload[i].length));
@@ -4680,7 +4680,7 @@ COMMAND_HANDLER(handle_fast_load_command)
 static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 {
 	command_context_t *context;
-	target_t *target;
+	struct target *target;
 	int retval;
 
 	context = Jim_GetAssocData(interp, "context");
diff --git a/src/target/target.h b/src/target/target.h
index b2c908a8..5f29e7f4 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -112,8 +112,6 @@ enum target_endianess
 
 extern const Jim_Nvp nvp_target_endian[];
 
-struct target_s;
-
 struct working_area
 {
 	uint32_t address;
@@ -124,8 +122,8 @@ struct working_area
 	struct working_area *next;
 };
 
-// target_type.h contains the full definitionof struct target_type
-typedef struct target_s
+// target_type.h contains the full definitionof struct targe_type
+struct target
 {
 	struct target_type *type;				/* target type definition (name, access functions) */
 	const char *cmd_name;				/* tcl Name of target */
@@ -155,13 +153,13 @@ typedef struct target_s
 	struct debug_msg_receiver *dbgmsg;/* list of debug message receivers */
 	uint32_t dbg_msg_enabled;				/* debug message status */
 	void *arch_info;					/* architecture specific information */
-	struct target_s *next;				/* next target in list */
+	struct target *next;				/* next target in list */
 
 	int display;						/* display async info in telnet session. Do not display
 										 * lots of halted/resumed info when stepping in debugger. */
 	bool halt_issued;					/* did we transition to halted state? */
 	long long halt_issued_time;			/* Note time when halt was issued */
-} target_t;
+};
 
 enum target_event
 {
@@ -228,7 +226,7 @@ struct target_event_action {
 
 struct target_event_callback
 {
-	int (*callback)(struct target_s *target, enum target_event event, void *priv);
+	int (*callback)(struct target *target, enum target_event event, void *priv);
 	void *priv;
 	struct target_event_callback *next;
 };
@@ -252,18 +250,18 @@ int target_process_reset(struct command_context_s *cmd_ctx,
 		enum target_reset_mode reset_mode);
 
 int target_register_event_callback(
-		int (*callback)(struct target_s *target,
+		int (*callback)(struct target *target,
 				enum target_event event, void *priv),
 		void *priv);
 int target_unregister_event_callback(
-		int (*callback)(struct target_s *target,
+		int (*callback)(struct target *target,
 				enum target_event event, void *priv),
 		void *priv);
-int target_poll(target_t *target);
-int target_resume(target_t *target, int current, uint32_t address,
+int target_poll(struct target *target);
+int target_resume(struct target *target, int current, uint32_t address,
 		int handle_breakpoints, int debug_execution);
-int target_halt(target_t *target);
-int target_call_event_callbacks(target_t *target, enum target_event event);
+int target_halt(struct target *target);
+int target_call_event_callbacks(struct target *target, enum target_event event);
 
 /**
  * The period is very approximate, the callback can happen much more often
@@ -280,28 +278,28 @@ int target_call_timer_callbacks(void);
  */
 int target_call_timer_callbacks_now(void);
 
-target_t* get_current_target(struct command_context_s *cmd_ctx);
-target_t *get_target(const char *id);
+struct target* get_current_target(struct command_context_s *cmd_ctx);
+struct target *get_target(const char *id);
 
 /**
  * Get the target name.
  *
  * This routine is a wrapper for the target->type->name field.
  */
-const char *target_get_name(struct target_s *target);
+const char *target_get_name(struct target *target);
 
 /**
  * Examine the specified @a target.
  *
  * This routine is a wrapper for target->type->examine.
  */
-int target_examine_one(struct target_s *target);
+int target_examine_one(struct target *target);
 /// @returns @c true if the target has been examined.
-bool target_was_examined(struct target_s *target);
+bool target_was_examined(struct target *target);
 /// Sets the @c examined flag for the given target.
-void target_set_examined(struct target_s *target);
+void target_set_examined(struct target *target);
 /// Reset the @c examined flag for the given target.
-void target_reset_examined(struct target_s *target);
+void target_reset_examined(struct target *target);
 
 
 /**
@@ -309,28 +307,28 @@ void target_reset_examined(struct target_s *target);
  *
  * This routine is a wrapper for target->type->add_breakpoint.
  */
-int target_add_breakpoint(struct target_s *target,
+int target_add_breakpoint(struct target *target,
 		struct breakpoint *breakpoint);
 /**
  * Remove the @a breakpoint for @a target.
  *
  * This routine is a wrapper for target->type->remove_breakpoint.
  */
-int target_remove_breakpoint(struct target_s *target,
+int target_remove_breakpoint(struct target *target,
 		struct breakpoint *breakpoint);
 /**
  * Add the @a watchpoint for @a target.
  *
  * This routine is a wrapper for target->type->add_watchpoint.
  */
-int target_add_watchpoint(struct target_s *target,
+int target_add_watchpoint(struct target *target,
 		struct watchpoint *watchpoint);
 /**
  * Remove the @a watchpoint for @a target.
  *
  * This routine is a wrapper for target->type->remove_watchpoint.
  */
-int target_remove_watchpoint(struct target_s *target,
+int target_remove_watchpoint(struct target *target,
 		struct watchpoint *watchpoint);
 
 /**
@@ -338,7 +336,7 @@ int target_remove_watchpoint(struct target_s *target,
  *
  * This routine is a wrapper for target->type->get_gdb_reg_list.
  */
-int target_get_gdb_reg_list(struct target_s *target,
+int target_get_gdb_reg_list(struct target *target,
 		struct reg **reg_list[], int *reg_list_size);
 
 /**
@@ -346,14 +344,14 @@ int target_get_gdb_reg_list(struct target_s *target,
  *
  * This routine is a wrapper for target->type->step.
  */
-int target_step(struct target_s *target,
+int target_step(struct target *target,
 		int current, uint32_t address, int handle_breakpoints);
 /**
  * Run an algorithm on the @a target given.
  *
  * This routine is a wrapper for target->type->run_algorithm.
  */
-int target_run_algorithm(struct target_s *target,
+int target_run_algorithm(struct target *target,
 		int num_mem_params, struct mem_param *mem_params,
 		int num_reg_params, struct reg_param *reg_param,
 		uint32_t entry_point, uint32_t exit_point,
@@ -365,7 +363,7 @@ int target_run_algorithm(struct target_s *target,
  *
  * This routine is a wrapper for target->type->read_memory.
  */
-int target_read_memory(struct target_s *target,
+int target_read_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 /**
  * Write @a count items of @a size bytes to the memory of @a target at
@@ -373,7 +371,7 @@ int target_read_memory(struct target_s *target,
  *
  * This routine is wrapper for target->type->write_memory.
  */
-int target_write_memory(struct target_s *target,
+int target_write_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 
 /**
@@ -383,7 +381,7 @@ int target_write_memory(struct target_s *target,
  *
  * This routine is wrapper for target->type->bulk_write_memory.
  */
-int target_bulk_write_memory(struct target_s *target,
+int target_bulk_write_memory(struct target *target,
 		uint32_t address, uint32_t count, uint8_t *buffer);
 
 /*
@@ -410,18 +408,18 @@ int target_bulk_write_memory(struct target_s *target,
  * write operation, thus making this fn suitable to e.g. write to special
  * peripheral registers which do not support byte operations.
  */
-int target_write_buffer(struct target_s *target,
+int target_write_buffer(struct target *target,
 		uint32_t address, uint32_t size, uint8_t *buffer);
-int target_read_buffer(struct target_s *target,
+int target_read_buffer(struct target *target,
 		uint32_t address, uint32_t size, uint8_t *buffer);
-int target_checksum_memory(struct target_s *target,
+int target_checksum_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t* crc);
-int target_blank_check_memory(struct target_s *target,
+int target_blank_check_memory(struct target *target,
 		uint32_t address, uint32_t size, uint32_t* blank);
-int target_wait_state(target_t *target, enum target_state state, int ms);
+int target_wait_state(struct target *target, enum target_state state, int ms);
 
 /** Return the *name* of this targets current state */
-const char *target_state_name( target_t *target );
+const char *target_state_name( struct target *target );
 
 /* DANGER!!!!!
  *
@@ -434,37 +432,37 @@ const char *target_state_name( target_t *target );
  * upon resuming or resetting the CPU.
  *
  */
-int target_alloc_working_area(struct target_s *target,
+int target_alloc_working_area(struct target *target,
 		uint32_t size, struct working_area **area);
-int target_free_working_area(struct target_s *target, struct working_area *area);
-int target_free_working_area_restore(struct target_s *target,
+int target_free_working_area(struct target *target, struct working_area *area);
+int target_free_working_area_restore(struct target *target,
 		struct working_area *area, int restore);
-void target_free_all_working_areas(struct target_s *target);
-void target_free_all_working_areas_restore(struct target_s *target, int restore);
+void target_free_all_working_areas(struct target *target);
+void target_free_all_working_areas_restore(struct target *target, int restore);
 
-extern target_t *all_targets;
+extern struct target *all_targets;
 
 extern struct target_event_callback *target_event_callbacks;
 extern struct target_timer_callback *target_timer_callbacks;
 
-uint32_t target_buffer_get_u32(target_t *target, const uint8_t *buffer);
-uint16_t target_buffer_get_u16(target_t *target, const uint8_t *buffer);
-uint8_t  target_buffer_get_u8 (target_t *target, const uint8_t *buffer);
-void target_buffer_set_u32(target_t *target, uint8_t *buffer, uint32_t value);
-void target_buffer_set_u16(target_t *target, uint8_t *buffer, uint16_t value);
-void target_buffer_set_u8 (target_t *target, uint8_t *buffer, uint8_t  value);
+uint32_t target_buffer_get_u32(struct target *target, const uint8_t *buffer);
+uint16_t target_buffer_get_u16(struct target *target, const uint8_t *buffer);
+uint8_t  target_buffer_get_u8 (struct target *target, const uint8_t *buffer);
+void target_buffer_set_u32(struct target *target, uint8_t *buffer, uint32_t value);
+void target_buffer_set_u16(struct target *target, uint8_t *buffer, uint16_t value);
+void target_buffer_set_u8 (struct target *target, uint8_t *buffer, uint8_t  value);
 
-int target_read_u32(struct target_s *target, uint32_t address, uint32_t *value);
-int target_read_u16(struct target_s *target, uint32_t address, uint16_t *value);
-int target_read_u8(struct target_s *target, uint32_t address, uint8_t *value);
-int target_write_u32(struct target_s *target, uint32_t address, uint32_t value);
-int target_write_u16(struct target_s *target, uint32_t address, uint16_t value);
-int target_write_u8(struct target_s *target, uint32_t address, uint8_t value);
+int target_read_u32(struct target *target, uint32_t address, uint32_t *value);
+int target_read_u16(struct target *target, uint32_t address, uint16_t *value);
+int target_read_u8(struct target *target, uint32_t address, uint8_t *value);
+int target_write_u32(struct target *target, uint32_t address, uint32_t value);
+int target_write_u16(struct target *target, uint32_t address, uint16_t value);
+int target_write_u8(struct target *target, uint32_t address, uint8_t value);
 
 /* Issues USER() statements with target state information */
-int target_arch_state(struct target_s *target);
+int target_arch_state(struct target *target);
 
-void target_handle_event(target_t *t, enum target_event e);
+void target_handle_event(struct target *t, enum target_event e);
 void target_all_handle_event(enum target_event e);
 
 #define ERROR_TARGET_INVALID	(-300)
diff --git a/src/target/target_request.c b/src/target/target_request.c
index 32da2728..f1bb243d 100644
--- a/src/target/target_request.c
+++ b/src/target/target_request.c
@@ -37,7 +37,7 @@
 static command_t *target_request_cmd = NULL;
 static int charmsg_mode = 0;
 
-static int target_asciimsg(target_t *target, uint32_t length)
+static int target_asciimsg(struct target *target, uint32_t length)
 {
 	char *msg = malloc(CEIL(length + 1, 4) * 4);
 	struct debug_msg_receiver *c = target->dbgmsg;
@@ -56,14 +56,14 @@ static int target_asciimsg(target_t *target, uint32_t length)
 	return ERROR_OK;
 }
 
-static int target_charmsg(target_t *target, uint8_t msg)
+static int target_charmsg(struct target *target, uint8_t msg)
 {
 	LOG_USER_N("%c", msg);
 
 	return ERROR_OK;
 }
 
-static int target_hexmsg(target_t *target, int size, uint32_t length)
+static int target_hexmsg(struct target *target, int size, uint32_t length)
 {
 	uint8_t *data = malloc(CEIL(length * size, 4) * 4);
 	char line[128];
@@ -113,7 +113,7 @@ static int target_hexmsg(target_t *target, int size, uint32_t length)
 /* handle requests from the target received by a target specific
  * side-band channel (e.g. ARM7/9 DCC)
  */
-int target_request(target_t *target, uint32_t request)
+int target_request(struct target *target, uint32_t request)
 {
 	target_req_cmd_t target_req_cmd = request & 0xff;
 
@@ -150,7 +150,7 @@ int target_request(target_t *target, uint32_t request)
 	return ERROR_OK;
 }
 
-static int add_debug_msg_receiver(struct command_context_s *cmd_ctx, target_t *target)
+static int add_debug_msg_receiver(struct command_context_s *cmd_ctx, struct target *target)
 {
 	struct debug_msg_receiver **p = &target->dbgmsg;
 
@@ -178,7 +178,7 @@ static int add_debug_msg_receiver(struct command_context_s *cmd_ctx, target_t *t
 	return ERROR_OK;
 }
 
-static struct debug_msg_receiver* find_debug_msg_receiver(struct command_context_s *cmd_ctx, target_t *target)
+static struct debug_msg_receiver* find_debug_msg_receiver(struct command_context_s *cmd_ctx, struct target *target)
 {
 	int do_all_targets = 0;
 	struct debug_msg_receiver **p = &target->dbgmsg;
@@ -211,7 +211,7 @@ static struct debug_msg_receiver* find_debug_msg_receiver(struct command_context
 	return NULL;
 }
 
-int delete_debug_msg_receiver(struct command_context_s *cmd_ctx, target_t *target)
+int delete_debug_msg_receiver(struct command_context_s *cmd_ctx, struct target *target)
 {
 	struct debug_msg_receiver **p;
 	struct debug_msg_receiver *c;
@@ -259,7 +259,7 @@ int delete_debug_msg_receiver(struct command_context_s *cmd_ctx, target_t *targe
 
 COMMAND_HANDLER(handle_target_request_debugmsgs_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 
 	int receiving = 0;
 
diff --git a/src/target/target_request.h b/src/target/target_request.h
index 669a8c6d..1fa7e8b4 100644
--- a/src/target/target_request.h
+++ b/src/target/target_request.h
@@ -42,9 +42,9 @@ struct debug_msg_receiver
 	struct debug_msg_receiver *next;
 };
 
-int target_request(target_t *target, uint32_t request);
+int target_request(struct target *target, uint32_t request);
 int delete_debug_msg_receiver(struct command_context_s *cmd_ctx,
-		target_t *target);
+		struct target *target);
 int target_request_register_commands(struct command_context_s *cmd_ctx);
 
 #endif /* TARGET_REQUEST_H */
diff --git a/src/target/target_type.h b/src/target/target_type.h
index 37e438de..32c58abb 100644
--- a/src/target/target_type.h
+++ b/src/target/target_type.h
@@ -28,7 +28,7 @@
 
 #include "types.h"
 
-struct target_s;
+struct target;
 
 struct target_type
 {
@@ -47,18 +47,18 @@ struct target_type
 	int examined;
 
 	/* poll current target status */
-	int (*poll)(struct target_s *target);
+	int (*poll)(struct target *target);
 	/* Invoked only from target_arch_state().
 	 * Issue USER() w/architecture specific status.  */
-	int (*arch_state)(struct target_s *target);
+	int (*arch_state)(struct target *target);
 
 	/* target request support */
-	int (*target_request_data)(struct target_s *target, uint32_t size, uint8_t *buffer);
+	int (*target_request_data)(struct target *target, uint32_t size, uint8_t *buffer);
 
 	/* halt will log a warning, but return ERROR_OK if the target is already halted. */
-	int (*halt)(struct target_s *target);
-	int (*resume)(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
-	int (*step)(struct target_s *target, int current, uint32_t address, int handle_breakpoints);
+	int (*halt)(struct target *target);
+	int (*resume)(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
+	int (*step)(struct target *target, int current, uint32_t address, int handle_breakpoints);
 
 	/* target reset control. assert reset can be invoked when OpenOCD and
 	 * the target is out of sync.
@@ -75,10 +75,10 @@ struct target_type
 	 * the way reset's are configured.
 	 *
 	 */
-	int (*assert_reset)(struct target_s *target);
-	int (*deassert_reset)(struct target_s *target);
-	int (*soft_reset_halt_imp)(struct target_s *target);
-	int (*soft_reset_halt)(struct target_s *target);
+	int (*assert_reset)(struct target *target);
+	int (*deassert_reset)(struct target *target);
+	int (*soft_reset_halt_imp)(struct target *target);
+	int (*soft_reset_halt)(struct target *target);
 
 	/**
 	 * Target register access for GDB.  Do @b not call this function
@@ -91,34 +91,34 @@ struct target_type
 	 * list, however it is after GDB is connected that monitor commands can
 	 * be run to properly initialize the target
 	 */
-	int (*get_gdb_reg_list)(struct target_s *target, struct reg **reg_list[], int *reg_list_size);
+	int (*get_gdb_reg_list)(struct target *target, struct reg **reg_list[], int *reg_list_size);
 
 	/* target memory access
 	* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
 	* count: number of items of <size>
 	*/
-	int (*read_memory_imp)(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+	int (*read_memory_imp)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 	/**
 	 * Target memory read callback.  Do @b not call this function
 	 * directly, use target_read_memory() instead.
 	 */
-	int (*read_memory)(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-	int (*write_memory_imp)(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+	int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+	int (*write_memory_imp)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 	/**
 	 * Target memory write callback.  Do @b not call this function
 	 * directly, use target_write_memory() instead.
 	 */
-	int (*write_memory)(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+	int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 
 	/**
 	 * Write target memory in multiples of 4 bytes, optimized for
 	 * writing large quantities of data.  Do @b not call this
 	 * function directly, use target_bulk_write_memory() instead.
 	 */
-	int (*bulk_write_memory)(struct target_s *target, uint32_t address, uint32_t count, uint8_t *buffer);
+	int (*bulk_write_memory)(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer);
 
-	int (*checksum_memory)(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum);
-	int (*blank_check_memory)(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank);
+	int (*checksum_memory)(struct target *target, uint32_t address, uint32_t count, uint32_t* checksum);
+	int (*blank_check_memory)(struct target *target, uint32_t address, uint32_t count, uint32_t* blank);
 
 	/*
 	 * target break-/watchpoint control
@@ -131,39 +131,39 @@ struct target_type
 	 *
 	 * Upon GDB connection all breakpoints/watchpoints are cleared.
 	 */
-	int (*add_breakpoint)(struct target_s *target, struct breakpoint *breakpoint);
+	int (*add_breakpoint)(struct target *target, struct breakpoint *breakpoint);
 
 	/* remove breakpoint. hw will only be updated if the target is currently halted.
 	 * However, this method can be invoked on unresponsive targets.
 	 */
-	int (*remove_breakpoint)(struct target_s *target, struct breakpoint *breakpoint);
-	int (*add_watchpoint)(struct target_s *target, struct watchpoint *watchpoint);
+	int (*remove_breakpoint)(struct target *target, struct breakpoint *breakpoint);
+	int (*add_watchpoint)(struct target *target, struct watchpoint *watchpoint);
 	/* remove watchpoint. hw will only be updated if the target is currently halted.
 	 * However, this method can be invoked on unresponsive targets.
 	 */
-	int (*remove_watchpoint)(struct target_s *target, struct watchpoint *watchpoint);
+	int (*remove_watchpoint)(struct target *target, struct watchpoint *watchpoint);
 
 	/* target algorithm support */
-	int (*run_algorithm_imp)(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
+	int (*run_algorithm_imp)(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
 	/**
 	 * Target algorithm support.  Do @b not call this method directly,
 	 * use target_run_algorithm() instead.
 	 */
-	int (*run_algorithm)(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
+	int (*run_algorithm)(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
 
 	int (*register_commands)(struct command_context_s *cmd_ctx);
 
 	/* called when target is created */
-	int (*target_create)(struct target_s *target, Jim_Interp *interp);
+	int (*target_create)(struct target *target, Jim_Interp *interp);
 
 	/* called for various config parameters */
 	/* returns JIM_CONTINUE - if option not understood */
 	/* otherwise: JIM_OK, or JIM_ERR, */
-	int (*target_jim_configure)(struct target_s *target, Jim_GetOptInfo *goi);
+	int (*target_jim_configure)(struct target *target, Jim_GetOptInfo *goi);
 
 	/* target commands specifically handled by the target */
 	/* returns JIM_OK, or JIM_ERR, or JIM_CONTINUE - if option not understood */
-	int (*target_jim_commands)(struct target_s *target, Jim_GetOptInfo *goi);
+	int (*target_jim_commands)(struct target *target, Jim_GetOptInfo *goi);
 
 	/* invoked after JTAG chain has been examined & validated. During
 	 * this stage the target is examined and any additional setup is
@@ -171,18 +171,18 @@ struct target_type
 	 *
 	 * invoked every time after the jtag chain has been validated/examined
 	 */
-	int (*examine)(struct target_s *target);
+	int (*examine)(struct target *target);
 	/* Set up structures for target.
 	 *
 	 * It is illegal to talk to the target at this stage as this fn is invoked
 	 * before the JTAG chain has been examined/verified
 	 * */
-	int (*init_target)(struct command_context_s *cmd_ctx, struct target_s *target);
+	int (*init_target)(struct command_context_s *cmd_ctx, struct target *target);
 
 	/* translate from virtual to physical address. Default implementation is successful
 	 * no-op(i.e. virtual==physical).
 	 */
-	int (*virt2phys)(struct target_s *target, uint32_t address, uint32_t *physical);
+	int (*virt2phys)(struct target *target, uint32_t address, uint32_t *physical);
 
 	/* read directly from physical memory. caches are bypassed and untouched.
 	 *
@@ -192,20 +192,20 @@ struct target_type
 	 *
 	 * Default implementation is to call read_memory.
 	 */
-	int (*read_phys_memory)(struct target_s *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer);
+	int (*read_phys_memory)(struct target *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer);
 
 	/*
 	 * same as read_phys_memory, except that it writes...
 	 */
-	int (*write_phys_memory)(struct target_s *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer);
+	int (*write_phys_memory)(struct target *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer);
 
-	int (*mmu)(struct target_s *target, int *enabled);
+	int (*mmu)(struct target *target, int *enabled);
 
 	/* Read coprocessor - arm specific. Default implementation returns error. */
-	int (*mrc)(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
+	int (*mrc)(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
 
 	/* Write coprocessor. Default implementation returns error.  */
-	int (*mcr)(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
+	int (*mcr)(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
 };
 
 #endif // TARGET_TYPE_H
diff --git a/src/target/trace.c b/src/target/trace.c
index bc6eec7c..bb57978c 100644
--- a/src/target/trace.c
+++ b/src/target/trace.c
@@ -25,7 +25,7 @@
 #include "trace.h"
 #include "target.h"
 
-int trace_point(target_t *target, uint32_t number)
+int trace_point(struct target *target, uint32_t number)
 {
 	struct trace *trace = target->trace_info;
 
@@ -49,7 +49,7 @@ int trace_point(target_t *target, uint32_t number)
 
 COMMAND_HANDLER(handle_trace_point_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct trace *trace = target->trace_info;
 
 	if (argc == 0)
@@ -97,7 +97,7 @@ COMMAND_HANDLER(handle_trace_point_command)
 
 COMMAND_HANDLER(handle_trace_history_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct trace *trace = target->trace_info;
 
 	if (argc > 0)
diff --git a/src/target/trace.h b/src/target/trace.h
index cca84d79..483f9429 100644
--- a/src/target/trace.h
+++ b/src/target/trace.h
@@ -22,7 +22,7 @@
 
 #include "types.h"
 
-struct target_s;
+struct target;
 struct command_context_s;
 
 struct trace_point
@@ -51,7 +51,7 @@ typedef enum trace_status
 	TRACE_OVERFLOWED = 0x8,
 } trace_status_t;
 
-int trace_point(struct target_s *target, uint32_t number);
+int trace_point(struct target *target, uint32_t number);
 int trace_register_commands(struct command_context_s *cmd_ctx);
 
 #define ERROR_TRACE_IMAGE_UNAVAILABLE		-(1500)
diff --git a/src/target/xscale.c b/src/target/xscale.c
index e757271a..ccf23b49 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -57,16 +57,16 @@
 
 
 /* forward declarations */
-static int xscale_resume(struct target_s *, int current,
+static int xscale_resume(struct target *, int current,
 	uint32_t address, int handle_breakpoints, int debug_execution);
-static int xscale_debug_entry(target_t *);
-static int xscale_restore_context(target_t *);
+static int xscale_debug_entry(struct target *);
+static int xscale_restore_context(struct target *);
 static int xscale_get_reg(struct reg *reg);
 static int xscale_set_reg(struct reg *reg, uint8_t *buf);
-static int xscale_set_breakpoint(struct target_s *, struct breakpoint *);
-static int xscale_set_watchpoint(struct target_s *, struct watchpoint *);
-static int xscale_unset_breakpoint(struct target_s *, struct breakpoint *);
-static int xscale_read_trace(target_t *);
+static int xscale_set_breakpoint(struct target *, struct breakpoint *);
+static int xscale_set_watchpoint(struct target *, struct watchpoint *);
+static int xscale_unset_breakpoint(struct target *, struct breakpoint *);
+static int xscale_read_trace(struct target *);
 
 
 /* This XScale "debug handler" is loaded into the processor's
@@ -178,7 +178,7 @@ static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr)
 	return ERROR_OK;
 }
 
-static int xscale_read_dcsr(target_t *target)
+static int xscale_read_dcsr(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	int retval;
@@ -251,7 +251,7 @@ static void xscale_getbuf(jtag_callback_data_t arg)
 	*((uint32_t *)in) = buf_get_u32(in, 0, 32);
 }
 
-static int xscale_receive(target_t *target, uint32_t *buffer, int num_words)
+static int xscale_receive(struct target *target, uint32_t *buffer, int num_words)
 {
 	if (num_words == 0)
 		return ERROR_INVALID_ARGUMENTS;
@@ -355,7 +355,7 @@ static int xscale_receive(target_t *target, uint32_t *buffer, int num_words)
 	return retval;
 }
 
-static int xscale_read_tx(target_t *target, int consume)
+static int xscale_read_tx(struct target *target, int consume)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	tap_state_t path[3];
@@ -453,7 +453,7 @@ static int xscale_read_tx(target_t *target, int consume)
 	return ERROR_OK;
 }
 
-static int xscale_write_rx(target_t *target)
+static int xscale_write_rx(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	int retval;
@@ -539,7 +539,7 @@ static int xscale_write_rx(target_t *target)
 }
 
 /* send count elements of size byte to the debug handler */
-static int xscale_send(target_t *target, uint8_t *buffer, int count, int size)
+static int xscale_send(struct target *target, uint8_t *buffer, int count, int size)
 {
 	uint32_t t[3];
 	int bits[3];
@@ -602,7 +602,7 @@ static int xscale_send(target_t *target, uint8_t *buffer, int count, int size)
 	return ERROR_OK;
 }
 
-static int xscale_send_u32(target_t *target, uint32_t value)
+static int xscale_send_u32(struct target *target, uint32_t value)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 
@@ -610,7 +610,7 @@ static int xscale_send_u32(target_t *target, uint32_t value)
 	return xscale_write_rx(target);
 }
 
-static int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
+static int xscale_write_dcsr(struct target *target, int hold_rst, int ext_dbg_brk)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	int retval;
@@ -681,7 +681,7 @@ static unsigned int parity (unsigned int v)
 	return (0x6996 >> v) & 1;
 }
 
-static int xscale_load_ic(target_t *target, uint32_t va, uint32_t buffer[8])
+static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8])
 {
 	uint8_t packet[4];
 	uint8_t cmd;
@@ -736,7 +736,7 @@ static int xscale_load_ic(target_t *target, uint32_t va, uint32_t buffer[8])
 	return jtag_execute_queue();
 }
 
-static int xscale_invalidate_ic_line(target_t *target, uint32_t va)
+static int xscale_invalidate_ic_line(struct target *target, uint32_t va)
 {
 	uint8_t packet[4];
 	uint8_t cmd;
@@ -766,7 +766,7 @@ static int xscale_invalidate_ic_line(target_t *target, uint32_t va)
 	return ERROR_OK;
 }
 
-static int xscale_update_vectors(target_t *target)
+static int xscale_update_vectors(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	int i;
@@ -830,7 +830,7 @@ static int xscale_update_vectors(target_t *target)
 	return ERROR_OK;
 }
 
-static int xscale_arch_state(struct target_s *target)
+static int xscale_arch_state(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common;
@@ -868,7 +868,7 @@ static int xscale_arch_state(struct target_s *target)
 	return ERROR_OK;
 }
 
-static int xscale_poll(target_t *target)
+static int xscale_poll(struct target *target)
 {
 	int retval = ERROR_OK;
 
@@ -908,7 +908,7 @@ static int xscale_poll(target_t *target)
 	return retval;
 }
 
-static int xscale_debug_entry(target_t *target)
+static int xscale_debug_entry(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common;
@@ -1088,7 +1088,7 @@ static int xscale_debug_entry(target_t *target)
 	return ERROR_OK;
 }
 
-static int xscale_halt(target_t *target)
+static int xscale_halt(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 
@@ -1122,7 +1122,7 @@ static int xscale_halt(target_t *target)
 	return ERROR_OK;
 }
 
-static int xscale_enable_single_step(struct target_s *target, uint32_t next_pc)
+static int xscale_enable_single_step(struct target *target, uint32_t next_pc)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct reg *ibcr0 = &xscale->reg_cache->reg_list[XSCALE_IBCR0];
@@ -1149,7 +1149,7 @@ static int xscale_enable_single_step(struct target_s *target, uint32_t next_pc)
 	return ERROR_OK;
 }
 
-static int xscale_disable_single_step(struct target_s *target)
+static int xscale_disable_single_step(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct reg *ibcr0 = &xscale->reg_cache->reg_list[XSCALE_IBCR0];
@@ -1161,7 +1161,7 @@ static int xscale_disable_single_step(struct target_s *target)
 	return ERROR_OK;
 }
 
-static void xscale_enable_watchpoints(struct target_s *target)
+static void xscale_enable_watchpoints(struct target *target)
 {
 	struct watchpoint *watchpoint = target->watchpoints;
 
@@ -1173,7 +1173,7 @@ static void xscale_enable_watchpoints(struct target_s *target)
 	}
 }
 
-static void xscale_enable_breakpoints(struct target_s *target)
+static void xscale_enable_breakpoints(struct target *target)
 {
 	struct breakpoint *breakpoint = target->breakpoints;
 
@@ -1186,7 +1186,7 @@ static void xscale_enable_breakpoints(struct target_s *target)
 	}
 }
 
-static int xscale_resume(struct target_s *target, int current,
+static int xscale_resume(struct target *target, int current,
 		uint32_t address, int handle_breakpoints, int debug_execution)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -1339,7 +1339,7 @@ static int xscale_resume(struct target_s *target, int current,
 	return ERROR_OK;
 }
 
-static int xscale_step_inner(struct target_s *target, int current,
+static int xscale_step_inner(struct target *target, int current,
 		uint32_t address, int handle_breakpoints)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -1419,7 +1419,7 @@ static int xscale_step_inner(struct target_s *target, int current,
 	return ERROR_OK;
 }
 
-static int xscale_step(struct target_s *target, int current,
+static int xscale_step(struct target *target, int current,
 		uint32_t address, int handle_breakpoints)
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
@@ -1474,7 +1474,7 @@ static int xscale_step(struct target_s *target, int current,
 
 }
 
-static int xscale_assert_reset(target_t *target)
+static int xscale_assert_reset(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 
@@ -1515,7 +1515,7 @@ static int xscale_assert_reset(target_t *target)
 	return ERROR_OK;
 }
 
-static int xscale_deassert_reset(target_t *target)
+static int xscale_deassert_reset(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct breakpoint *breakpoint = target->breakpoints;
@@ -1649,21 +1649,21 @@ static int xscale_deassert_reset(target_t *target)
 	return ERROR_OK;
 }
 
-static int xscale_read_core_reg(struct target_s *target, int num,
+static int xscale_read_core_reg(struct target *target, int num,
 		enum armv4_5_mode mode)
 {
 	LOG_ERROR("not implemented");
 	return ERROR_OK;
 }
 
-static int xscale_write_core_reg(struct target_s *target, int num,
+static int xscale_write_core_reg(struct target *target, int num,
 		enum armv4_5_mode mode, uint32_t value)
 {
 	LOG_ERROR("not implemented");
 	return ERROR_OK;
 }
 
-static int xscale_full_context(target_t *target)
+static int xscale_full_context(struct target *target)
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 
@@ -1739,7 +1739,7 @@ static int xscale_full_context(target_t *target)
 	return ERROR_OK;
 }
 
-static int xscale_restore_context(target_t *target)
+static int xscale_restore_context(struct target *target)
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 
@@ -1806,7 +1806,7 @@ static int xscale_restore_context(target_t *target)
 	return ERROR_OK;
 }
 
-static int xscale_read_memory(struct target_s *target, uint32_t address,
+static int xscale_read_memory(struct target *target, uint32_t address,
 		uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -1885,7 +1885,7 @@ static int xscale_read_memory(struct target_s *target, uint32_t address,
 	return ERROR_OK;
 }
 
-static int xscale_write_memory(struct target_s *target, uint32_t address,
+static int xscale_write_memory(struct target *target, uint32_t address,
 		uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -1963,13 +1963,13 @@ static int xscale_write_memory(struct target_s *target, uint32_t address,
 	return ERROR_OK;
 }
 
-static int xscale_bulk_write_memory(target_t *target, uint32_t address,
+static int xscale_bulk_write_memory(struct target *target, uint32_t address,
 		uint32_t count, uint8_t *buffer)
 {
 	return xscale_write_memory(target, address, 4, count, buffer);
 }
 
-static uint32_t xscale_get_ttb(target_t *target)
+static uint32_t xscale_get_ttb(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	uint32_t ttb;
@@ -1980,7 +1980,7 @@ static uint32_t xscale_get_ttb(target_t *target)
 	return ttb;
 }
 
-static void xscale_disable_mmu_caches(target_t *target, int mmu,
+static void xscale_disable_mmu_caches(struct target *target, int mmu,
 		int d_u_cache, int i_cache)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -2019,7 +2019,7 @@ static void xscale_disable_mmu_caches(target_t *target, int mmu,
 	xscale_send_u32(target, 0x53);
 }
 
-static void xscale_enable_mmu_caches(target_t *target, int mmu,
+static void xscale_enable_mmu_caches(struct target *target, int mmu,
 		int d_u_cache, int i_cache)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -2045,7 +2045,7 @@ static void xscale_enable_mmu_caches(target_t *target, int mmu,
 	xscale_send_u32(target, 0x53);
 }
 
-static int xscale_set_breakpoint(struct target_s *target,
+static int xscale_set_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	int retval;
@@ -2118,7 +2118,7 @@ static int xscale_set_breakpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int xscale_add_breakpoint(struct target_s *target,
+static int xscale_add_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -2149,7 +2149,7 @@ static int xscale_add_breakpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int xscale_unset_breakpoint(struct target_s *target,
+static int xscale_unset_breakpoint(struct target *target,
 		struct breakpoint *breakpoint)
 {
 	int retval;
@@ -2204,7 +2204,7 @@ static int xscale_unset_breakpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int xscale_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
+static int xscale_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 
@@ -2225,7 +2225,7 @@ static int xscale_remove_breakpoint(struct target_s *target, struct breakpoint *
 	return ERROR_OK;
 }
 
-static int xscale_set_watchpoint(struct target_s *target,
+static int xscale_set_watchpoint(struct target *target,
 		struct watchpoint *watchpoint)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -2281,7 +2281,7 @@ static int xscale_set_watchpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int xscale_add_watchpoint(struct target_s *target,
+static int xscale_add_watchpoint(struct target *target,
 		struct watchpoint *watchpoint)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -2307,7 +2307,7 @@ static int xscale_add_watchpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int xscale_unset_watchpoint(struct target_s *target,
+static int xscale_unset_watchpoint(struct target *target,
 		struct watchpoint *watchpoint)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -2343,7 +2343,7 @@ static int xscale_unset_watchpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int xscale_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
+static int xscale_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 
@@ -2366,7 +2366,7 @@ static int xscale_remove_watchpoint(struct target_s *target, struct watchpoint *
 static int xscale_get_reg(struct reg *reg)
 {
 	struct xscale_reg *arch_info = reg->arch_info;
-	target_t *target = arch_info->target;
+	struct target *target = arch_info->target;
 	struct xscale_common *xscale = target_to_xscale(target);
 
 	/* DCSR, TX and RX are accessible via JTAG */
@@ -2411,7 +2411,7 @@ static int xscale_get_reg(struct reg *reg)
 static int xscale_set_reg(struct reg *reg, uint8_t* buf)
 {
 	struct xscale_reg *arch_info = reg->arch_info;
-	target_t *target = arch_info->target;
+	struct target *target = arch_info->target;
 	struct xscale_common *xscale = target_to_xscale(target);
 	uint32_t value = buf_get_u32(buf, 0, 32);
 
@@ -2452,7 +2452,7 @@ static int xscale_set_reg(struct reg *reg, uint8_t* buf)
 	return ERROR_OK;
 }
 
-static int xscale_write_dcsr_sw(target_t *target, uint32_t value)
+static int xscale_write_dcsr_sw(struct target *target, uint32_t value)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct reg *dcsr = &xscale->reg_cache->reg_list[XSCALE_DCSR];
@@ -2471,7 +2471,7 @@ static int xscale_write_dcsr_sw(target_t *target, uint32_t value)
 	return ERROR_OK;
 }
 
-static int xscale_read_trace(target_t *target)
+static int xscale_read_trace(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common;
@@ -2549,7 +2549,7 @@ static int xscale_read_trace(target_t *target)
 	return ERROR_OK;
 }
 
-static int xscale_read_instruction(target_t *target,
+static int xscale_read_instruction(struct target *target,
 		struct arm_instruction *instruction)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -2630,7 +2630,7 @@ static int xscale_branch_address(struct xscale_trace_data *trace_data,
 	return 0;
 }
 
-static int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx)
+static int xscale_analyze_trace(struct target *target, command_context_t *cmd_ctx)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	int next_pc_ok = 0;
@@ -2817,7 +2817,7 @@ static int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx)
 	return ERROR_OK;
 }
 
-static void xscale_build_reg_cache(target_t *target)
+static void xscale_build_reg_cache(struct target *target)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common;
@@ -2861,13 +2861,13 @@ static void xscale_build_reg_cache(target_t *target)
 }
 
 static int xscale_init_target(struct command_context_s *cmd_ctx,
-		struct target_s *target)
+		struct target *target)
 {
 	xscale_build_reg_cache(target);
 	return ERROR_OK;
 }
 
-static int xscale_init_arch_info(target_t *target,
+static int xscale_init_arch_info(struct target *target,
 		struct xscale_common *xscale, struct jtag_tap *tap, const char *variant)
 {
 	struct arm *armv4_5;
@@ -2972,7 +2972,7 @@ static int xscale_init_arch_info(target_t *target,
 	return ERROR_OK;
 }
 
-static int xscale_target_create(struct target_s *target, Jim_Interp *interp)
+static int xscale_target_create(struct target *target, Jim_Interp *interp)
 {
 	struct xscale_common *xscale;
 
@@ -2991,7 +2991,7 @@ static int xscale_target_create(struct target_s *target, Jim_Interp *interp)
 
 COMMAND_HANDLER(xscale_handle_debug_handler_command)
 {
-	target_t *target = NULL;
+	struct target *target = NULL;
 	struct xscale_common *xscale;
 	int retval;
 	uint32_t handler_address;
@@ -3031,7 +3031,7 @@ COMMAND_HANDLER(xscale_handle_debug_handler_command)
 
 COMMAND_HANDLER(xscale_handle_cache_clean_address_command)
 {
-	target_t *target = NULL;
+	struct target *target = NULL;
 	struct xscale_common *xscale;
 	int retval;
 	uint32_t cache_clean_address;
@@ -3068,7 +3068,7 @@ COMMAND_HANDLER(xscale_handle_cache_clean_address_command)
 
 COMMAND_HANDLER(xscale_handle_cache_info_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	int retval;
 
@@ -3079,7 +3079,7 @@ COMMAND_HANDLER(xscale_handle_cache_info_command)
 	return armv4_5_handle_cache_info_command(cmd_ctx, &xscale->armv4_5_mmu.armv4_5_cache);
 }
 
-static int xscale_virt2phys(struct target_s *target,
+static int xscale_virt2phys(struct target *target,
 		uint32_t virtual, uint32_t *physical)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
@@ -3102,7 +3102,7 @@ static int xscale_virt2phys(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int xscale_mmu(struct target_s *target, int *enabled)
+static int xscale_mmu(struct target *target, int *enabled)
 {
 	struct xscale_common *xscale = target_to_xscale(target);
 
@@ -3117,7 +3117,7 @@ static int xscale_mmu(struct target_s *target, int *enabled)
 
 COMMAND_HANDLER(xscale_handle_mmu_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	int retval;
 
@@ -3152,7 +3152,7 @@ COMMAND_HANDLER(xscale_handle_mmu_command)
 
 COMMAND_HANDLER(xscale_handle_idcache_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	int icache = 0, dcache = 0;
 	int retval;
@@ -3205,7 +3205,7 @@ COMMAND_HANDLER(xscale_handle_idcache_command)
 
 COMMAND_HANDLER(xscale_handle_vector_catch_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	int retval;
 
@@ -3232,7 +3232,7 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command)
 
 COMMAND_HANDLER(xscale_handle_vector_table_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	int err = 0;
 	int retval;
@@ -3290,7 +3290,7 @@ COMMAND_HANDLER(xscale_handle_vector_table_command)
 
 COMMAND_HANDLER(xscale_handle_trace_buffer_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common;
 	uint32_t dcsr_value;
@@ -3369,7 +3369,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
 
 COMMAND_HANDLER(xscale_handle_trace_image_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	int retval;
 
@@ -3417,7 +3417,7 @@ COMMAND_HANDLER(xscale_handle_trace_image_command)
 
 COMMAND_HANDLER(xscale_handle_dump_trace_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	struct xscale_trace_data *trace_data;
 	struct fileio file;
@@ -3474,7 +3474,7 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command)
 
 COMMAND_HANDLER(xscale_handle_analyze_trace_buffer_command)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	int retval;
 
@@ -3489,7 +3489,7 @@ COMMAND_HANDLER(xscale_handle_analyze_trace_buffer_command)
 
 COMMAND_HANDLER(xscale_handle_cp15)
 {
-	target_t *target = get_current_target(cmd_ctx);
+	struct target *target = get_current_target(cmd_ctx);
 	struct xscale_common *xscale = target_to_xscale(target);
 	int retval;
 
diff --git a/src/target/xscale.h b/src/target/xscale.h
index 9f25327f..4f1b54d8 100644
--- a/src/target/xscale.h
+++ b/src/target/xscale.h
@@ -132,7 +132,7 @@ struct xscale_common
 };
 
 static inline struct xscale_common *
-target_to_xscale(struct target_s *target)
+target_to_xscale(struct target *target)
 {
 	return container_of(target->arch_info, struct xscale_common,
 			armv4_5_common);
@@ -141,7 +141,7 @@ target_to_xscale(struct target_s *target)
 struct xscale_reg
 {
 	int dbg_handler_number;
-	target_t *target;
+	struct target *target;
 };
 
 enum