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author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-18 07:02:12 +0000 |
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committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-18 07:02:12 +0000 |
commit | 350f608256d167851a13f6b976c465b54f1056ad (patch) | |
tree | 61ad5b6ef612a876afb6440fa4270502e8cd0578 /src/target | |
parent | 6416474891419beaed29d8744feea319c48dc7eb (diff) | |
download | openocd+libswd-350f608256d167851a13f6b976c465b54f1056ad.tar.gz openocd+libswd-350f608256d167851a13f6b976c465b54f1056ad.tar.bz2 openocd+libswd-350f608256d167851a13f6b976c465b54f1056ad.tar.xz openocd+libswd-350f608256d167851a13f6b976c465b54f1056ad.zip |
Michael Bruck <mbruck@digenius.de> ARM11 cleanup stale dependencies with generic arm code; added comments and whitespace fixes
git-svn-id: svn://svn.berlios.de/openocd/trunk@1807 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/arm11.c | 36 | ||||
-rw-r--r-- | src/target/arm11.h | 7 | ||||
-rw-r--r-- | src/target/arm11_dbgtap.c | 8 |
3 files changed, 26 insertions, 25 deletions
diff --git a/src/target/arm11.c b/src/target/arm11.c index 18c3bd5c..45deb60c 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -1,5 +1,6 @@ /*************************************************************************** * Copyright (C) 2008 digenius technology GmbH. * + * Michael Bruck * * * * Copyright (C) 2008 Oyvind Harboe oyvind.harboe@zylin.com * * * @@ -336,7 +337,9 @@ int arm11_check_init(arm11_common_t * arm11, u32 * dscr) if (*dscr & ARM11_DSCR_CORE_HALTED) { /** \todo TODO: this needs further scrutiny because - * arm11_on_enter_debug_state() never gets properly called + * arm11_on_enter_debug_state() never gets properly called. + * As a result we don't read the actual register states from + * the target. */ arm11->target->state = TARGET_HALTED; @@ -389,8 +392,8 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11) scan_field_t chain5_fields[3]; arm11_setup_field(arm11, 32, NULL, &R(WDTR), chain5_fields + 0); - arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 1); - arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2); + arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 1); + arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2); arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE); } @@ -679,7 +682,7 @@ int arm11_poll(struct target_s *target) enum target_state old_state = target->state; LOG_DEBUG("enter TARGET_HALTED"); - target->state = TARGET_HALTED; + target->state = TARGET_HALTED; target->debug_reason = arm11_get_DSCR_debug_reason(dscr); arm11_on_enter_debug_state(arm11); @@ -692,7 +695,7 @@ int arm11_poll(struct target_s *target) if (target->state != TARGET_RUNNING && target->state != TARGET_DEBUG_RUNNING) { LOG_DEBUG("enter TARGET_RUNNING"); - target->state = TARGET_RUNNING; + target->state = TARGET_RUNNING; target->debug_reason = DBG_REASON_NOTHALTED; } } @@ -1369,7 +1372,6 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t int timeout_ms, void *arch_info) { arm11_common_t *arm11 = target->arch_info; - armv4_5_algorithm_t *arm11_algorithm_info = arch_info; // enum armv4_5_state core_state = arm11->core_state; // enum armv4_5_mode core_mode = arm11->core_mode; u32 context[16]; @@ -1378,11 +1380,6 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t int retval = ERROR_OK; LOG_DEBUG("Running algorithm"); - if (arm11_algorithm_info->common_magic != ARMV4_5_COMMON_MAGIC) - { - LOG_ERROR("current target isn't an ARMV4/5 target"); - return ERROR_TARGET_INVALID; - } if (target->state != TARGET_HALTED) { @@ -1441,6 +1438,12 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t exit(-1); } */ + + +/* arm11 at this point only supports ARM not THUMB mode + however if this test needs to be reactivated the current state can be read back + from CPSR */ +#if 0 if (arm11_algorithm_info->core_mode != ARMV4_5_MODE_ANY) { LOG_DEBUG("setting core_mode: 0x%2.2x", arm11_algorithm_info->core_mode); @@ -1448,6 +1451,7 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t arm11->reg_list[ARM11_RC_CPSR].dirty = 1; arm11->reg_list[ARM11_RC_CPSR].valid = 1; } +#endif if ((retval = breakpoint_add(target, exit_point, exit_breakpoint_size, BKPT_HARD)) != ERROR_OK) { @@ -1535,12 +1539,6 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp) arm11->target = target; - /* prepare JTAG information for the new target */ - arm11->jtag_info.tap = target->tap; - arm11->jtag_info.scann_size = 5; - - CHECK_RETVAL(arm_jtag_setup_connection(&arm11->jtag_info)); - if (target->tap==NULL) return ERROR_FAIL; @@ -1956,7 +1954,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx) RC_FINAL_BOOL( "error_fatal", "Terminate program if transfer error was found (default: enabled)", memwrite_error_fatal) - ) + ) /* memwrite */ RC_FINAL_BOOL( "no_increment", "Don't increment address on multi-read/-write (default: disabled)", memrw_no_increment) @@ -1972,7 +1970,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx) RC_FINAL( "mcr", "Write Coprocessor register", arm11_handle_mcr) - ) + ) /* arm11 */ return ERROR_OK; } diff --git a/src/target/arm11.h b/src/target/arm11.h index 4f75a62e..53b2fe6b 100644 --- a/src/target/arm11.h +++ b/src/target/arm11.h @@ -1,5 +1,6 @@ /*************************************************************************** * Copyright (C) 2008 digenius technology GmbH. * + * Michael Bruck * * * * Copyright (C) 2008 Georg Acher <acher@in.tum.de> * * * @@ -22,7 +23,9 @@ #ifndef ARM11_H #define ARM11_H -#include "embeddedice.h" +#include "target.h" +#include "register.h" +#include "jtag.h" #define asizeof(x) (sizeof(x) / sizeof((x)[0])) @@ -78,8 +81,6 @@ typedef struct arm11_common_s { target_t * target; /**< Reference back to the owner */ - arm_jtag_t jtag_info; /**< Handler to access assigned JTAG device */ - /** \name Processor type detection */ /*@{*/ diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index 0a86bc08..3a5c1dda 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -1,5 +1,6 @@ /*************************************************************************** * Copyright (C) 2008 digenius technology GmbH. * + * Michael Bruck * * * * Copyright (C) 2008 Oyvind Harboe oyvind.harboe@zylin.com * * * @@ -81,7 +82,7 @@ int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state */ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, void * in_data, scan_field_t * field) { - field->tap = arm11->jtag_info.tap; + field->tap = arm11->target->tap; field->num_bits = num_bits; field->out_value = out_data; field->in_value = in_data; @@ -99,7 +100,7 @@ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, vo void arm11_add_IR(arm11_common_t * arm11, u8 instr, tap_state_t state) { jtag_tap_t *tap; - tap = arm11->jtag_info.tap; + tap = arm11->target->tap; if (buf_get_u32(tap->cur_instr, 0, 5) == instr) { @@ -211,7 +212,8 @@ void arm11_add_debug_INST(arm11_common_t * arm11, u32 inst, u8 * flag, tap_state * same as CP14 c1 * * \param arm11 Target state variable. - * \return DSCR content + * \param value DSCR content + * \return Error status * * \remarks This is a stand-alone function that executes the JTAG command queue. */ |