ETM: remove old mid-level ETM handle

Now that nothing uses the old ETM handle any more, remove it.
Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
access ETM facilities.

Now ARM11 could support standard ETM (and ETB) access as soon as
it derives from "struct arm" ... its scanchain 6 is used access
the ETM, just like ARM7 and ARM9.

The Cortex parts (both M3 and A8) will need modified access methods
(via ETM init parameters), so they use the DAP.  Our first A8 target
(OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
useful without SWO trace support (it's painfully stripped down), so
that support won't be worth adding for a while.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

7 files changed, 8 insertions, 11 deletions

diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h
index c0145d95..a49dab27 100644
--- a/src/target/arm7_9_common.h
+++ b/src/target/arm7_9_common.h
@@ -30,7 +30,7 @@
 #define ARM7_9_COMMON_H
 
 #include "breakpoints.h"
-#include "etm.h"
+#include "armv4_5.h"
 
 #define	ARM7_9_COMMON_MAGIC 0x0a790a79 /**< */
 
@@ -39,7 +39,7 @@
  */
 typedef struct arm7_9_common_s
 {
-	armv4_5_common_t armv4_5_common;
+	struct arm armv4_5_common;
 	uint32_t common_magic;
 
 	arm_jtag_t jtag_info; /**< JTAG information for target */
@@ -69,8 +69,6 @@ typedef struct arm7_9_common_s
 	bool fast_memory_access;
 	bool dcc_downloads;
 
-	etm_context_t *etm_ctx;
-
 	struct working_area_s *dcc_working_area;
 
 	int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */
diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index 4d87c083..1eaab12d 100644
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -29,6 +29,7 @@
 #include "register.h"
 #include "target.h"
 #include "log.h"
+#include "etm.h"
 
 typedef enum armv4_5_mode
 {
diff --git a/src/target/etb.c b/src/target/etb.c
index 28ef3ef4..3a4e3fe4 100644
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -21,7 +21,7 @@
 #include "config.h"
 #endif
 
-#include "arm7_9_common.h"
+#include "armv4_5.h"
 #include "etb.h"
 
 
diff --git a/src/target/etm.c b/src/target/etm.c
index 53d31a15..990c0629 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -21,10 +21,9 @@
 #include "config.h"
 #endif
 
-#include "etm.h"
+#include "armv4_5.h"
 #include "etb.h"
 #include "image.h"
-#include "arm7_9_common.h"
 #include "arm_disassembler.h"
 
 
diff --git a/src/target/etm.h b/src/target/etm.h
index 2335c983..254db925 100644
--- a/src/target/etm.h
+++ b/src/target/etm.h
@@ -25,7 +25,6 @@
 
 #include "trace.h"
 #include "arm_jtag.h"
-#include "armv4_5.h"
 
 struct image_s;
 
@@ -158,7 +157,7 @@ typedef struct etm
 	uint32_t trace_depth;		/* number of cycles to be analyzed, 0 if no data available */
 	etm_portmode_t portmode;	/* normal, multiplexed or demultiplexed */
 	etmv1_tracemode_t tracemode;	/* type of info trace contains */
-	armv4_5_state_t core_state;	/* current core state */
+	int /*armv4_5_state_t*/ core_state;	/* current core state */
 	struct image_s *image;		/* source for target opcodes */
 	uint32_t pipe_index;		/* current trace cycle */
 	uint32_t data_index;		/* cycle holding next data packet */
diff --git a/src/target/etm_dummy.c b/src/target/etm_dummy.c
index eba1865e..0c5fc111 100644
--- a/src/target/etm_dummy.c
+++ b/src/target/etm_dummy.c
@@ -21,8 +21,8 @@
 #include "config.h"
 #endif
 
+#include "armv4_5.h"
 #include "etm_dummy.h"
-#include "arm7_9_common.h"
 
 
 static int handle_etm_dummy_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
diff --git a/src/target/oocd_trace.c b/src/target/oocd_trace.c
index 4ee84fff..e0048e64 100644
--- a/src/target/oocd_trace.c
+++ b/src/target/oocd_trace.c
@@ -21,8 +21,8 @@
 #include "config.h"
 #endif
 
+#include "armv4_5.h"
 #include "oocd_trace.h"
-#include "arm7_9_common.h"
 
 /*
  * This is "proof of concept" code, for prototype hardware: