ARM DPM: tweak initialization

Move the initial breakpoint/watchpoint disable calls to
arm_dpm_initialize(), and start using that routine.  This
split helps with arm11 support.

6 files changed, 33 insertions, 23 deletions

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 605e741b..50534143 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -1330,10 +1330,8 @@ static int arm11_examine(struct target *target)
 	/* Build register cache "late", after target_init(), since we
 	 * want to know if this core supports Secure Monitor mode.
 	 */
-	if (!target_was_examined(target)) {
-		arm11_dpm_init(arm11, didr);
-		retval = arm_dpm_setup(&arm11->dpm);
-	}
+	if (!target_was_examined(target))
+		retval = arm11_dpm_init(arm11, didr);
 
 	/* ETM on ARM11 still uses original scanchain 6 access mode */
 	if (arm11->arm.etm && !target_was_examined(target)) {
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index cfcb5bfa..6ce308e5 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -1022,10 +1022,11 @@ static int arm11_dpm_instr_read_data_r0(struct arm_dpm *dpm,
 			opcode, data);
 }
 
-
-void arm11_dpm_init(struct arm11_common *arm11, uint32_t didr)
+/** Set up high-level debug module utilities */
+int arm11_dpm_init(struct arm11_common *arm11, uint32_t didr)
 {
 	struct arm_dpm *dpm = &arm11->dpm;
+	int retval;
 
 	dpm->arm = &arm11->arm;
 
@@ -1039,4 +1040,12 @@ void arm11_dpm_init(struct arm11_common *arm11, uint32_t didr)
 
 	dpm->instr_read_data_dcc = arm11_dpm_instr_read_data_dcc;
 	dpm->instr_read_data_r0 = arm11_dpm_instr_read_data_r0;
+
+	retval = arm_dpm_setup(dpm);
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = arm_dpm_initialize(dpm);
+
+	return retval;
 }
diff --git a/src/target/arm11_dbgtap.h b/src/target/arm11_dbgtap.h
index 8b6a2065..2203361d 100644
--- a/src/target/arm11_dbgtap.h
+++ b/src/target/arm11_dbgtap.h
@@ -60,7 +60,6 @@ void arm11_sc7_set_vcr(struct arm11_common *arm11, uint32_t value);
 int arm11_read_memory_word(struct arm11_common *arm11,
 		uint32_t address, uint32_t *result);
 
-/* Set up high-level debug module utilities */
-void arm11_dpm_init(struct arm11_common *arm11, uint32_t didr);
+int arm11_dpm_init(struct arm11_common *arm11, uint32_t didr);
 
 #endif // ARM11_DBGTAP_H
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 7c09e064..434c63e1 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -807,18 +807,6 @@ int arm_dpm_setup(struct arm_dpm *dpm)
 		return ERROR_FAIL;
 	}
 
-	/* Disable all breakpoints and watchpoints at startup. */
-	if (dpm->bpwp_disable) {
-		unsigned i;
-
-		for (i = 0; i < dpm->nbp; i++)
-			(void) dpm->bpwp_disable(dpm, i);
-		for (i = 0; i < dpm->nwp; i++)
-			(void) dpm->bpwp_disable(dpm, 16 + i);
-	} else
-		LOG_WARNING("%s: can't disable breakpoints and watchpoints",
-			target_name(target));
-
 	LOG_INFO("%s: hardware has %d breakpoints, %d watchpoints",
 			target_name(target), dpm->nbp, dpm->nwp);
 
@@ -835,6 +823,17 @@ int arm_dpm_setup(struct arm_dpm *dpm)
  */
 int arm_dpm_initialize(struct arm_dpm *dpm)
 {
-	/* FIXME -- nothing yet */
+	/* Disable all breakpoints and watchpoints at startup. */
+	if (dpm->bpwp_disable) {
+		unsigned i;
+
+		for (i = 0; i < dpm->nbp; i++)
+			(void) dpm->bpwp_disable(dpm, i);
+		for (i = 0; i < dpm->nwp; i++)
+			(void) dpm->bpwp_disable(dpm, 16 + i);
+	} else
+		LOG_WARNING("%s: can't disable breakpoints and watchpoints",
+			target_name(dpm->arm->target));
+
 	return ERROR_OK;
 }
diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h
index 191f465a..c284144a 100644
--- a/src/target/arm_dpm.h
+++ b/src/target/arm_dpm.h
@@ -129,7 +129,7 @@ struct arm_dpm {
 };
 
 int arm_dpm_setup(struct arm_dpm *dpm);
-int arm_dpm_reinitialize(struct arm_dpm *dpm);
+int arm_dpm_initialize(struct arm_dpm *dpm);
 
 int arm_dpm_read_current_registers(struct arm_dpm *);
 int arm_dpm_write_dirty_registers(struct arm_dpm *, bool bpwp);
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 5f2de765..9ca072e0 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -523,6 +523,7 @@ static int cortex_a8_bpwp_disable(struct arm_dpm *dpm, unsigned index)
 static int cortex_a8_dpm_setup(struct cortex_a8_common *a8, uint32_t didr)
 {
 	struct arm_dpm *dpm = &a8->armv7a_common.dpm;
+	int retval;
 
 	dpm->arm = &a8->armv7a_common.armv4_5_common;
 	dpm->didr = didr;
@@ -540,7 +541,11 @@ static int cortex_a8_dpm_setup(struct cortex_a8_common *a8, uint32_t didr)
 	dpm->bpwp_enable = cortex_a8_bpwp_enable;
 	dpm->bpwp_disable = cortex_a8_bpwp_disable;
 
-	return arm_dpm_setup(dpm);
+	retval = arm_dpm_setup(dpm);
+	if (retval == ERROR_OK)
+		retval = arm_dpm_initialize(dpm);
+
+	return retval;
 }