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| author | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-21 20:19:02 +0000 |
|---|---|---|
| committer | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-21 20:19:02 +0000 |
| commit | d460a7cd6cc218bd4c3cc8a98ba32a4a81a62018 (patch) | |
| tree | 17fe093b017e64e47e670b27e3681a8a4a23c8dc /src/target | |
| parent | 4da019edeb62154978dfac6a37e738814b2f2724 (diff) | |
| download | openocd+libswd-d460a7cd6cc218bd4c3cc8a98ba32a4a81a62018.tar.gz openocd+libswd-d460a7cd6cc218bd4c3cc8a98ba32a4a81a62018.tar.bz2 openocd+libswd-d460a7cd6cc218bd4c3cc8a98ba32a4a81a62018.tar.xz openocd+libswd-d460a7cd6cc218bd4c3cc8a98ba32a4a81a62018.zip | |
David Brownell <david-b@pacbell.net>:
Dump SP on poll, and show whether it's MSP or PSP.
Thread mode can use either stack pointer, so this is
part of the state that's not yet displayed.
Shrink some lines.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2555 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/armv7m.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 74c1ce43..f8c84306 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -478,14 +478,21 @@ int armv7m_arch_state(struct target_s *target) { /* get pointers to arch-specific information */ armv7m_common_t *armv7m = target->arch_info; + uint32_t ctrl, sp; + + ctrl = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_CONTROL].value, 0, 32); + sp = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_R13].value, 0, 32); LOG_USER("target halted due to %s, current mode: %s %s\n" - "xPSR: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32, - Jim_Nvp_value2name_simple(nvp_target_debug_reason,target->debug_reason)->name, + "xPSR: %#8.8" PRIx32 " pc: %#8.8" PRIx32 " %csp: %#8.8" PRIx32, + Jim_Nvp_value2name_simple(nvp_target_debug_reason, + target->debug_reason)->name, armv7m_mode_strings[armv7m->core_mode], armv7m_exception_string(armv7m->exception_number), buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32), - buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_PC].value, 0, 32)); + buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_PC].value, 0, 32), + (ctrl & 0x02) ? 'p' : 'm', + sp); return ERROR_OK; } |