SimonQian <simonqian@simonqian.com> AVR wip

git-svn-id: svn://svn.berlios.de/openocd/trunk@1540 b42882b7-edfa-0310-969c-e2dbd0fdcd60

4 files changed, 391 insertions, 2 deletions

diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index b852c572..fb0ce3b0 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -13,11 +13,11 @@ libtarget_a_SOURCES = target.c register.c breakpoints.c armv4_5.c embeddedice.c
 	arm_jtag.c arm7_9_common.c algorithm.c arm920t.c arm720t.c armv4_5_mmu.c armv4_5_cache.c arm_disassembler.c \
 	arm966e.c arm926ejs.c feroceon.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c arm_adi_v5.c \
 	etm_dummy.c $(OOCD_TRACE_FILES) target_request.c trace.c arm11.c arm11_dbgtap.c mips32.c mips_m4k.c \
-	mips32_pracc.c mips32_dmaacc.c mips_ejtag.c
+	mips32_pracc.c mips32_dmaacc.c mips_ejtag.c avrt.c
 noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7tdmi.h arm9tdmi.h \
 	arm_jtag.h arm7_9_common.h arm920t.h arm720t.h armv4_5_mmu.h armv4_5_cache.h breakpoints.h algorithm.h \
 	arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h arm_adi_v5.h \
-	etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h
+	etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h avrt.h
 
 nobase_dist_pkglib_DATA =
 nobase_dist_pkglib_DATA += xscale/debug_handler.bin 
diff --git a/src/target/avrt.c b/src/target/avrt.c
new file mode 100644
index 00000000..f67f1969
--- /dev/null
+++ b/src/target/avrt.c
@@ -0,0 +1,354 @@
+/***************************************************************************

+ *   Copyright (C) 2009 by Simon Qian                                      *

+ *   SimonQian@SimonQian.com                                               *

+ *                                                                         *

+ *   This program is free software; you can redistribute it and/or modify  *

+ *   it under the terms of the GNU General Public License as published by  *

+ *   the Free Software Foundation; either version 2 of the License, or     *

+ *   (at your option) any later version.                                   *

+ *                                                                         *

+ *   This program is distributed in the hope that it will be useful,       *

+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *

+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *

+ *   GNU General Public License for more details.                          *

+ *                                                                         *

+ *   You should have received a copy of the GNU General Public License     *

+ *   along with this program; if not, write to the                         *

+ *   Free Software Foundation, Inc.,                                       *

+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *

+ ***************************************************************************/

+#ifdef HAVE_CONFIG_H

+#include "config.h"

+#endif

+

+#include "replacements.h"

+

+#include "avrt.h"

+

+#include "register.h"

+#include "target.h"

+#include "log.h"

+#include "jtag.h"

+#include "binarybuffer.h"

+#include "time_support.h"

+#include "breakpoints.h"

+#include "fileio.h"

+

+#include <stdlib.h>

+#include <string.h>

+

+#include <sys/types.h>

+#include <unistd.h>

+#include <errno.h>

+

+#define AVR_JTAG_INS_LEN							4

+

+/* cli handling */

+int avr_register_commands(struct command_context_s *cmd_ctx);

+

+/* forward declarations */

+int avr_target_create(struct target_s *target, Jim_Interp *interp);

+int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target);

+int avr_quit(void);

+

+int avr_arch_state(struct target_s *target);

+int avr_poll(target_t *target);

+int avr_halt(target_t *target);

+int avr_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);

+int avr_step(struct target_s *target, int current, u32 address, int handle_breakpoints);

+

+int avr_assert_reset(target_t *target);

+int avr_deassert_reset(target_t *target);

+int avr_soft_reset_halt(struct target_s *target);

+

+/* IR and DR functions */

+int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out);

+int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);

+

+int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti);

+int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti);

+int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti);

+int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti);

+int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);

+int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);

+int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);

+int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);

+int mcu_execute_queue(void);

+

+target_type_t avr_target =

+{

+	.name = "avr",

+

+	.poll = avr_poll,

+	.arch_state = avr_arch_state,

+

+	.target_request_data = NULL,

+

+	.halt = avr_halt,

+	.resume = avr_resume,

+	.step = avr_step,

+

+	.assert_reset = avr_assert_reset,

+	.deassert_reset = avr_deassert_reset,

+	.soft_reset_halt = avr_soft_reset_halt,

+/*

+	.get_gdb_reg_list = avr_get_gdb_reg_list,

+

+	.read_memory = avr_read_memory,

+	.write_memory = avr_write_memory,

+	.bulk_write_memory = avr_bulk_write_memory,

+	.checksum_memory = avr_checksum_memory,

+	.blank_check_memory = avr_blank_check_memory,

+

+	.run_algorithm = avr_run_algorithm,

+

+	.add_breakpoint = avr_add_breakpoint,

+	.remove_breakpoint = avr_remove_breakpoint,

+	.add_watchpoint = avr_add_watchpoint,

+	.remove_watchpoint = avr_remove_watchpoint,

+*/

+	.register_commands = avr_register_commands,

+	.target_create = avr_target_create,

+	.init_target = avr_init_target,

+	.quit = avr_quit,

+/*

+	.virt2phys = avr_virt2phys,

+	.mmu = avr_mmu

+*/

+};

+

+int avr_register_commands(struct command_context_s *cmd_ctx)

+{

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_target_create(struct target_s *target, Jim_Interp *interp)

+{

+	avr_common_t *avr = calloc(1, sizeof(avr_common_t));

+	

+	avr->jtag_info.tap = target->tap;

+	target->arch_info = avr;

+	

+	return ERROR_OK;

+}

+

+int avr_init_target(struct command_context_s *cmd_ctx, struct target_s *target)

+{

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_quit(void)

+{

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_arch_state(struct target_s *target)

+{

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_poll(target_t *target)

+{

+	if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING))

+	{

+		target->state = TARGET_HALTED;

+	}

+	

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_halt(target_t *target)

+{

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)

+{

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_step(struct target_s *target, int current, u32 address, int handle_breakpoints)

+{

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_assert_reset(target_t *target)

+{

+	target->state = TARGET_RESET;

+	

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_deassert_reset(target_t *target)

+{

+	target->state = TARGET_RUNNING;

+	

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_soft_reset_halt(struct target_s *target)

+{

+	LOG_DEBUG(__FUNCTION__);

+	return ERROR_OK;

+}

+

+int avr_jtag_senddat(jtag_tap_t *tap, u32* dr_in, u32 dr_out, int len)

+{

+	return mcu_write_dr_u32(tap, dr_in, dr_out, len, 1);

+}

+

+int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out)

+{

+	return mcu_write_ir_u8(tap, ir_in, ir_out, AVR_JTAG_INS_LEN, 1);

+}

+

+/* IR and DR functions */

+int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti)

+{

+	if (NULL == tap)

+	{

+		LOG_ERROR("invalid tap");

+		return ERROR_FAIL;

+	}

+	if (ir_len != tap->ir_length)

+	{

+		LOG_ERROR("invalid ir_len");

+		return ERROR_FAIL;

+	}

+	

+	{

+		scan_field_t field[1];

+		

+		field[0].tap = tap;

+		field[0].num_bits = tap->ir_length;

+		field[0].out_value = ir_out;

+		field[0].out_mask = NULL;

+		field[0].in_value = ir_in;

+		field[0].in_check_value = NULL;

+		field[0].in_check_mask = NULL;

+		field[0].in_handler = NULL;

+		field[0].in_handler_priv = NULL;

+		jtag_add_plain_ir_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);

+	}

+	

+	return ERROR_OK;

+}

+

+int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti)

+{

+	if (NULL == tap)

+	{

+		LOG_ERROR("invalid tap");

+		return ERROR_FAIL;

+	}

+	

+	{

+		scan_field_t field[1];

+		

+		field[0].tap = tap;

+		field[0].num_bits = dr_len;

+		field[0].out_value = dr_out;

+		field[0].out_mask = NULL;

+		field[0].in_value = dr_in;

+		field[0].in_check_value = NULL;

+		field[0].in_check_mask = NULL;

+		field[0].in_handler = NULL;

+		field[0].in_handler_priv = NULL;

+		jtag_add_plain_dr_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);

+	}

+	

+	return ERROR_OK;

+}

+

+int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti)

+{

+	if (ir_len > 8)

+	{

+		LOG_ERROR("ir_len overflow, maxium is 8");

+		return ERROR_FAIL;

+	}

+	

+	mcu_write_ir(tap, ir_in, &ir_out, ir_len, rti);

+	

+	return ERROR_OK;

+}

+

+int mcu_write_dr_u8(jtag_tap_t *tap, u8 *dr_in, u8 dr_out, int dr_len, int rti)

+{

+	if (dr_len > 8)

+	{

+		LOG_ERROR("dr_len overflow, maxium is 8");

+		return ERROR_FAIL;

+	}

+	

+	mcu_write_dr(tap, dr_in, &dr_out, dr_len, rti);

+	

+	return ERROR_OK;

+}

+

+int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti)

+{

+	if (ir_len > 16)

+	{

+		LOG_ERROR("ir_len overflow, maxium is 16");

+		return ERROR_FAIL;

+	}

+	

+	mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti);

+	

+	return ERROR_OK;

+}

+

+int mcu_write_dr_u16(jtag_tap_t *tap, u16 *dr_in, u16 dr_out, int dr_len, int rti)

+{

+	if (dr_len > 16)

+	{

+		LOG_ERROR("dr_len overflow, maxium is 16");

+		return ERROR_FAIL;

+	}

+	

+	mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti);

+	

+	return ERROR_OK;

+}

+

+int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti)

+{

+	if (ir_len > 32)

+	{

+		LOG_ERROR("ir_len overflow, maxium is 32");

+		return ERROR_FAIL;

+	}

+	

+	mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti);

+	

+	return ERROR_OK;

+}

+

+int mcu_write_dr_u32(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int dr_len, int rti)

+{

+	if (dr_len > 32)

+	{

+		LOG_ERROR("dr_len overflow, maxium is 32");

+		return ERROR_FAIL;

+	}

+	

+	mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti);

+	

+	return ERROR_OK;

+}

+

+int mcu_execute_queue(void)

+{

+	return jtag_execute_queue();

+}

diff --git a/src/target/avrt.h b/src/target/avrt.h
new file mode 100644
index 00000000..fccba44c
--- /dev/null
+++ b/src/target/avrt.h
@@ -0,0 +1,33 @@
+/***************************************************************************

+ *   Copyright (C) 2009 by Simon Qian                                      *

+ *   SimonQian@SimonQian.com                                               *

+ *                                                                         *

+ *   This program is free software; you can redistribute it and/or modify  *

+ *   it under the terms of the GNU General Public License as published by  *

+ *   the Free Software Foundation; either version 2 of the License, or     *

+ *   (at your option) any later version.                                   *

+ *                                                                         *

+ *   This program is distributed in the hope that it will be useful,       *

+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *

+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *

+ *   GNU General Public License for more details.                          *

+ *                                                                         *

+ *   You should have received a copy of the GNU General Public License     *

+ *   along with this program; if not, write to the                         *

+ *   Free Software Foundation, Inc.,                                       *

+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *

+ ***************************************************************************/

+#ifndef AVRT_H

+#define AVRT_H

+

+typedef struct mcu_jtag_s

+{

+	jtag_tap_t *tap;

+} mcu_jtag_t;

+

+typedef struct avr_common_s

+{

+	mcu_jtag_t jtag_info;

+} avr_common_t;

+

+#endif /* AVRT_H */

diff --git a/src/target/target.c b/src/target/target.c
index 39b603a2..0b058aeb 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -105,6 +105,7 @@ extern target_type_t xscale_target;
 extern target_type_t cortexm3_target;
 extern target_type_t arm11_target;
 extern target_type_t mips_m4k_target;
+extern target_type_t avr_target;
 
 target_type_t *target_types[] =
 {
@@ -119,6 +120,7 @@ target_type_t *target_types[] =
 	&cortexm3_target,
 	&arm11_target,
 	&mips_m4k_target,
+	&avr_target,
 	NULL,
 };