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authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-10-07 12:08:00 +0000
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-10-07 12:08:00 +0000
commite8e59951601da48f254f068916f8034cb6a20924 (patch)
tree03a3818276cea88bfc6a610465ea18dea6a2dac5 /src/target
parent3b2518bd734b6fedbaf102f89a75126aafe73651 (diff)
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fixed crash in dummy register handling
git-svn-id: svn://svn.berlios.de/openocd/trunk@1024 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target')
-rw-r--r--src/target/armv7m.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 8ab9ddbe..38f635ea 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -8,6 +8,9 @@
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
+ * Copyright (C) 2007,2008 Øyvind Harboe *
+ * oyvind.harboe@zylin.com *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
@@ -119,6 +122,7 @@ armv7m_core_reg_t armv7m_core_reg_list_arch_info[] =
};
int armv7m_core_reg_arch_type = -1;
+int armv7m_dummy_core_reg_arch_type = -1;
int armv7m_restore_context(target_t *target)
{
@@ -194,6 +198,21 @@ int armv7m_set_core_reg(reg_t *reg, u8 *buf)
return ERROR_OK;
}
+int armv7m_get_dummy_core_reg(reg_t *reg)
+{
+ return ERROR_OK;
+}
+
+int armv7m_set_dummy_core_reg(reg_t *reg, u8 *buf)
+{
+ u32 value = buf_get_u32(buf, 0, 32);
+ buf_set_u32(reg->value, 0, 32, value);
+ reg->dirty = 1;
+ reg->valid = 1;
+
+ return ERROR_OK;
+}
+
int armv7m_read_core_reg(struct target_s *target, int num)
{
u32 reg_value;
@@ -464,7 +483,14 @@ reg_cache_t *armv7m_build_reg_cache(target_t *target)
int i;
if (armv7m_core_reg_arch_type == -1)
+ {
armv7m_core_reg_arch_type = register_reg_arch_type(armv7m_get_core_reg, armv7m_set_core_reg);
+ armv7m_dummy_core_reg_arch_type = register_reg_arch_type(armv7m_get_dummy_core_reg, armv7m_set_dummy_core_reg);
+
+ armv7m_gdb_dummy_fp_reg.arch_type=armv7m_dummy_core_reg_arch_type;
+ armv7m_gdb_dummy_fps_reg.arch_type=armv7m_dummy_core_reg_arch_type;
+ armv7m_gdb_dummy_cpsr_reg.arch_type=armv7m_dummy_core_reg_arch_type;
+ }
/* Build the process context cache */
cache->name = "arm v7m registers";