diff options
| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-13 16:58:14 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-13 16:58:14 -0800 |
| commit | ecab0cfe25600ad13c174b78a637515943cc870a (patch) | |
| tree | 8c7db5b5f424ddae85565f2ed2c0185e3e84821f /src/target | |
| parent | 817bf743023de7fea901e89157da57b90c7c326c (diff) | |
| download | openocd+libswd-ecab0cfe25600ad13c174b78a637515943cc870a.tar.gz openocd+libswd-ecab0cfe25600ad13c174b78a637515943cc870a.tar.bz2 openocd+libswd-ecab0cfe25600ad13c174b78a637515943cc870a.tar.xz openocd+libswd-ecab0cfe25600ad13c174b78a637515943cc870a.zip | |
ARM11: ETM + ETB support
Kick in ETM (and ETB) support for ARM11. Tested on OMAP 2420,
so update that configuration. (That's an ARM1136ejs, ETB,
OpenGL ES1.1, C55x DSP, etc.)
Also update the other ARM11 ETM + ETB targets in the tree
to set up these modules. (Not tested.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/arm11.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/src/target/arm11.c b/src/target/arm11.c index b30e5181..7a30bc7f 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -1898,6 +1898,20 @@ static int arm11_examine(struct target *target) if (retval != ERROR_OK) return retval; + /* ETM on ARM11 still uses original scanchain 6 access mode */ + if (arm11->arm.etm && !target_was_examined(target)) { + *register_get_last_cache_p(&target->reg_cache) = + etm_build_reg_cache(target, &arm11->jtag_info, + arm11->arm.etm); + retval = etm_setup(target); + } + + /* FIXME this sets a flag in the (shared) arm11_target structure, + * not in the (per-cpu) "target" structure ... so it's clearly + * wrong in the case of e.g. two different ARM11 chips on the + * same board. (Maybe ARM11 MPCore works though.) Whoever calls + * the examine() method should set a target-specific flag... + */ target_set_examined(target); return ERROR_OK; @@ -2212,5 +2226,5 @@ int arm11_register_commands(struct command_context *cmd_ctx) arm11_handle_vcr, COMMAND_ANY, "Control (Interrupt) Vector Catch Register"); - return ERROR_OK; + return etm_register_commands(cmd_ctx); } |