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authorØyvind Harboe <oyvind.harboe@zylin.com>2009-12-29 12:30:02 +0100
committerØyvind Harboe <oyvind.harboe@zylin.com>2009-12-30 12:12:32 +0100
commit272c33c190a72999697dd1d7b74a7603d30a84b8 (patch)
tree99a4d36acf6d5e14bdb3b8905753fbd3efbd3791 /src
parentbd3700e89d80b2548890102da3e25012acbd3e41 (diff)
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zy1000: reconfigure FPGA upon reset instead of just the CPU
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Diffstat (limited to 'src')
-rw-r--r--src/ecosboard.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/ecosboard.c b/src/ecosboard.c
index 32eb0852..d7fdabdb 100644
--- a/src/ecosboard.c
+++ b/src/ecosboard.c
@@ -62,6 +62,7 @@
#include "rom.h"
#ifdef CYGPKG_HAL_NIOS2
+#include <cyg/hal/io.h>
#define ZY1000_SER_DEV "/dev/uart_0"
#else
#define ZY1000_SER_DEV "/dev/ser0"
@@ -145,7 +146,14 @@ static void zylinjtag_reboot(cyg_addrword_t data)
diag_printf("Unmounting /config..\n");
umount("/config");
diag_printf("Rebooting..\n");
+#ifdef CYGPKG_HAL_NIOS2
+ /* This will reboot & reconfigure the FPGA from the bootloader
+ * and on.
+ */
+ IOWR(REMOTE_UPDATE_BASE, 0x20, 0x1);
+#else
HAL_PLATFORM_RESET();
+#endif
}
static cyg_thread zylinjtag_thread_object;
static cyg_handle_t zylinjtag_thread_handle;