Uwe Hermann tightned up comments, etc. to follow OpenOCD policy

git-svn-id: svn://svn.berlios.de/openocd/trunk@431 b42882b7-edfa-0310-969c-e2dbd0fdcd60

17 files changed, 107 insertions, 98 deletions

diff --git a/src/flash/cfi.c b/src/flash/cfi.c
index 8567a444..f4968a8b 100644
--- a/src/flash/cfi.c
+++ b/src/flash/cfi.c
@@ -129,7 +129,8 @@ void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups)
 	}
 }
 
-inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
+/* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */
+__inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
 {
 	/* while the sector list isn't built, only accesses to sector 0 work */
 	if (sector == 0)
diff --git a/src/flash/ecos.c b/src/flash/ecos.c
index 57c760fd..6a312ced 100644
--- a/src/flash/ecos.c
+++ b/src/flash/ecos.c
@@ -82,21 +82,21 @@ char *
 flash_errmsg(int err);
 
 #ifndef __ECOS
-#define FLASH_ERR_OK              0x00  // No error - operation complete
-#define FLASH_ERR_INVALID         0x01  // Invalid FLASH address
-#define FLASH_ERR_ERASE           0x02  // Error trying to erase
-#define FLASH_ERR_LOCK            0x03  // Error trying to lock/unlock
-#define FLASH_ERR_PROGRAM         0x04  // Error trying to program
-#define FLASH_ERR_PROTOCOL        0x05  // Generic error
-#define FLASH_ERR_PROTECT         0x06  // Device/region is write-protected
-#define FLASH_ERR_NOT_INIT        0x07  // FLASH info not yet initialized
-#define FLASH_ERR_HWR             0x08  // Hardware (configuration?) problem
-#define FLASH_ERR_ERASE_SUSPEND   0x09  // Device is in erase suspend mode
-#define FLASH_ERR_PROGRAM_SUSPEND 0x0a  // Device is in in program suspend mode
-#define FLASH_ERR_DRV_VERIFY      0x0b  // Driver failed to verify data
-#define FLASH_ERR_DRV_TIMEOUT     0x0c  // Driver timed out waiting for device
-#define FLASH_ERR_DRV_WRONG_PART  0x0d  // Driver does not support device
-#define FLASH_ERR_LOW_VOLTAGE     0x0e  // Not enough juice to complete job
+#define FLASH_ERR_OK              0x00  /* No error - operation complete */
+#define FLASH_ERR_INVALID         0x01  /* Invalid FLASH address */
+#define FLASH_ERR_ERASE           0x02  /* Error trying to erase */
+#define FLASH_ERR_LOCK            0x03  /* Error trying to lock/unlock */
+#define FLASH_ERR_PROGRAM         0x04  /* Error trying to program */
+#define FLASH_ERR_PROTOCOL        0x05  /* Generic error */
+#define FLASH_ERR_PROTECT         0x06  /* Device/region is write-protected */
+#define FLASH_ERR_NOT_INIT        0x07  /* FLASH info not yet initialized */
+#define FLASH_ERR_HWR             0x08  /* Hardware (configuration?) problem */
+#define FLASH_ERR_ERASE_SUSPEND   0x09  /* Device is in erase suspend mode */
+#define FLASH_ERR_PROGRAM_SUSPEND 0x0a  /* Device is in in program suspend mode */
+#define FLASH_ERR_DRV_VERIFY      0x0b  /* Driver failed to verify data */
+#define FLASH_ERR_DRV_TIMEOUT     0x0c  /* Driver timed out waiting for device */
+#define FLASH_ERR_DRV_WRONG_PART  0x0d  /* Driver does not support device */
+#define FLASH_ERR_LOW_VOLTAGE     0x0e  /* Not enough juice to complete job */
 
 
 char *
@@ -158,9 +158,10 @@ int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c
 	bank->driver_priv = info;
 	info->driverPath=strdup(args[6]);
 
-	// eCos flash sector sizes are not exposed to OpenOCD, use 0x10000 as 
-	// a way to improve impeadance matach between OpenOCD and eCos flash
-	// driver
+	/* eCos flash sector sizes are not exposed to OpenOCD, use 0x10000 as 
+	 * a way to improve impeadance matach between OpenOCD and eCos flash
+	 * driver.
+	 */
 	int i = 0;
 	u32 offset = 0;
 	bank->num_sectors=bank->size/sectorSize;
@@ -238,7 +239,7 @@ static int const OFFSET_GET_WORKAREA_SIZE=0x4;
 int runCode(ecosflash_flash_bank_t *info, 
 		u32 codeStart, u32 codeStop, u32 r0, u32 r1, u32 r2, 
 		u32 *result,
-		// timeout in ms
+		/* timeout in ms */
 		int timeout)
 {
 	target_t *target=info->target;
diff --git a/src/flash/str9xpec.c b/src/flash/str9xpec.c
index ea7aa97f..4a24d85d 100644
--- a/src/flash/str9xpec.c
+++ b/src/flash/str9xpec.c
@@ -794,8 +794,8 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 			if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
 				return ERROR_FLASH_OPERATION_FAILED;
 			
-			//if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
-			//	return ERROR_FLASH_OPERATION_FAILED;
+			/* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
+				return ERROR_FLASH_OPERATION_FAILED; */
 		
 			dwords_remaining--;
 			bytes_written += 8;
@@ -854,8 +854,8 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 		if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
 			return ERROR_FLASH_OPERATION_FAILED;
 		
-		//if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
-		//	return ERROR_FLASH_OPERATION_FAILED;
+		/* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
+			return ERROR_FLASH_OPERATION_FAILED; */
 	}
 
 	free(scanbuf);
diff --git a/src/helper/replacements.h b/src/helper/replacements.h
index 296afdb6..fcfa8bc8 100644
--- a/src/helper/replacements.h
+++ b/src/helper/replacements.h
@@ -99,8 +99,8 @@ void *fill_malloc(size_t size);
  * the following macros. Which is the default way.
  */
  
-//#define malloc(_a) clear_malloc(_a)
-//#define malloc(_a) fill_malloc(_a)
+/* #define malloc(_a) clear_malloc(_a) */
+/* #define malloc(_a) fill_malloc(_a) */
 
 /* GNU extensions to the C library that may be missing on some systems */
 #ifndef HAVE_STRNDUP
diff --git a/src/jtag/ft2232.c b/src/jtag/ft2232.c
index 1a058675..1ac61abb 100644
--- a/src/jtag/ft2232.c
+++ b/src/jtag/ft2232.c
@@ -513,7 +513,7 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
 			BUFFER_ADD = TAP_MOVE(cur_state, TAP_SD);
 			cur_state = TAP_SD;
 		}
-		//DEBUG("added TMS scan (no read)");
+		/* DEBUG("added TMS scan (no read)"); */
 	}
 	
 	/* add command for complete bytes */
@@ -524,19 +524,19 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
 		{
 			/* Clock Data Bytes In and Out LSB First */
 			BUFFER_ADD = 0x39;
-			//DEBUG("added TDI bytes (io %i)", num_bytes);
+			/* DEBUG("added TDI bytes (io %i)", num_bytes); */
 		}
 		else if (type == SCAN_OUT)
 		{
 			/* Clock Data Bytes Out on -ve Clock Edge LSB First (no Read) */
 			BUFFER_ADD = 0x19;
-			//DEBUG("added TDI bytes (o)");
+			/* DEBUG("added TDI bytes (o)"); */
 		}
 		else if (type == SCAN_IN)
 		{
 			/* Clock Data Bytes In on +ve Clock Edge LSB First (no Write) */
 			BUFFER_ADD = 0x28;
-			//DEBUG("added TDI bytes (i %i)", num_bytes);
+			/* DEBUG("added TDI bytes (i %i)", num_bytes); */
 		}
 		thisrun_bytes = (num_bytes > 65537) ? 65536 : (num_bytes - 1);
 		num_bytes -= thisrun_bytes;
@@ -571,19 +571,19 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
 		{
 			/* Clock Data Bits In and Out LSB First */
 			BUFFER_ADD = 0x3b;
-			//DEBUG("added TDI bits (io) %i", bits_left - 1);
+			/* DEBUG("added TDI bits (io) %i", bits_left - 1); */
 		}
 		else if (type == SCAN_OUT)
 		{
 			/* Clock Data Bits Out on -ve Clock Edge LSB First (no Read) */
 			BUFFER_ADD = 0x1b;
-			//DEBUG("added TDI bits (o)");
+			/* DEBUG("added TDI bits (o)"); */
 		}
 		else if (type == SCAN_IN)
 		{
 			/* Clock Data Bits In on +ve Clock Edge LSB First (no Write) */
 			BUFFER_ADD = 0x2a;
-			//DEBUG("added TDI bits (i %i)", bits_left - 1);
+			/* DEBUG("added TDI bits (i %i)", bits_left - 1); */
 		}
 		BUFFER_ADD = bits_left - 2;
 		if (type != SCAN_IN)
@@ -597,19 +597,19 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
 		{
 			/* Clock Data Bits In and Out LSB First */
 			BUFFER_ADD = 0x3b;
-			//DEBUG("added TDI bits (io) %i", bits_left - 1);
+			/* DEBUG("added TDI bits (io) %i", bits_left - 1); */
 		}
 		else if (type == SCAN_OUT)
 		{
 			/* Clock Data Bits Out on -ve Clock Edge LSB First (no Read) */
 			BUFFER_ADD = 0x1b;
-			//DEBUG("added TDI bits (o)");
+			/* DEBUG("added TDI bits (o)"); */
 		}
 		else if (type == SCAN_IN)
 		{
 			/* Clock Data Bits In on +ve Clock Edge LSB First (no Write) */
 			BUFFER_ADD = 0x2a;
-			//DEBUG("added TDI bits (i %i)", bits_left - 1);
+			/* DEBUG("added TDI bits (i %i)", bits_left - 1); */
 		}
 		BUFFER_ADD = 0x0;
 		BUFFER_ADD = last_bit;
@@ -621,13 +621,13 @@ void ft2232_add_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size
 		{
 			/* Clock Data to TMS/CS Pin with Read */
 			BUFFER_ADD = 0x6b;
-			//DEBUG("added TMS scan (read)");
+			/* DEBUG("added TMS scan (read)"); */
 		}
 		else
 		{
 			/* Clock Data to TMS/CS Pin (no Read) */
 			BUFFER_ADD = 0x4b;
-			//DEBUG("added TMS scan (no read)");
+			/* DEBUG("added TMS scan (no read)"); */
 		}
 		BUFFER_ADD = 0x6;
 		BUFFER_ADD = TAP_MOVE(cur_state, end_state) | (last_bit << 7);
@@ -682,19 +682,19 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
 		{
 			/* Clock Data Bytes In and Out LSB First */
 			BUFFER_ADD = 0x39;
-			//DEBUG("added TDI bytes (io %i)", num_bytes);
+			/* DEBUG("added TDI bytes (io %i)", num_bytes); */
 		}
 		else if (type == SCAN_OUT)
 		{
 			/* Clock Data Bytes Out on -ve Clock Edge LSB First (no Read) */
 			BUFFER_ADD = 0x19;
-			//DEBUG("added TDI bytes (o)");
+			/* DEBUG("added TDI bytes (o)"); */
 		}
 		else if (type == SCAN_IN)
 		{
 			/* Clock Data Bytes In on +ve Clock Edge LSB First (no Write) */
 			BUFFER_ADD = 0x28;
-			//DEBUG("added TDI bytes (i %i)", num_bytes);
+			/* DEBUG("added TDI bytes (i %i)", num_bytes); */
 		}
 		thisrun_bytes = (num_bytes > 65537) ? 65536 : (num_bytes - 1);
 		thisrun_read = thisrun_bytes;
@@ -751,19 +751,19 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
 		{
 			/* Clock Data Bits In and Out LSB First */
 			BUFFER_ADD = 0x3b;
-			//DEBUG("added TDI bits (io) %i", bits_left - 1);
+			/* DEBUG("added TDI bits (io) %i", bits_left - 1); */
 		}
 		else if (type == SCAN_OUT)
 		{
 			/* Clock Data Bits Out on -ve Clock Edge LSB First (no Read) */
 			BUFFER_ADD = 0x1b;
-			//DEBUG("added TDI bits (o)");
+			/* DEBUG("added TDI bits (o)"); */
 		}
 		else if (type == SCAN_IN)
 		{
 			/* Clock Data Bits In on +ve Clock Edge LSB First (no Write) */
 			BUFFER_ADD = 0x2a;
-			//DEBUG("added TDI bits (i %i)", bits_left - 1);
+			/* DEBUG("added TDI bits (i %i)", bits_left - 1); */
 		}
 		BUFFER_ADD = bits_left - 2;
 		if (type != SCAN_IN)
@@ -779,19 +779,19 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
 		{
 			/* Clock Data Bits In and Out LSB First */
 			BUFFER_ADD = 0x3b;
-			//DEBUG("added TDI bits (io) %i", bits_left - 1);
+			/* DEBUG("added TDI bits (io) %i", bits_left - 1); */
 		}
 		else if (type == SCAN_OUT)
 		{
 			/* Clock Data Bits Out on -ve Clock Edge LSB First (no Read) */
 			BUFFER_ADD = 0x1b;
-			//DEBUG("added TDI bits (o)");
+			/* DEBUG("added TDI bits (o)"); */
 		}
 		else if (type == SCAN_IN)
 		{
 			/* Clock Data Bits In on +ve Clock Edge LSB First (no Write) */
 			BUFFER_ADD = 0x2a;
-			//DEBUG("added TDI bits (i %i)", bits_left - 1);
+			/* DEBUG("added TDI bits (i %i)", bits_left - 1); */
 		}
 		BUFFER_ADD = 0x0;
 		BUFFER_ADD = last_bit;
@@ -803,13 +803,13 @@ int ft2232_large_scan(scan_command_t *cmd, enum scan_type type, u8 *buffer, int
 		{
 			/* Clock Data to TMS/CS Pin with Read */
 			BUFFER_ADD = 0x6b;
-			//DEBUG("added TMS scan (read)");
+			/* DEBUG("added TMS scan (read)"); */
 		}
 		else
 		{
 			/* Clock Data to TMS/CS Pin (no Read) */
 			BUFFER_ADD = 0x4b;
-			//DEBUG("added TMS scan (no read)");
+			/* DEBUG("added TMS scan (no read)"); */
 		}
 		BUFFER_ADD = 0x6;
 		BUFFER_ADD = TAP_MOVE(cur_state, end_state) | (last_bit << 7);
@@ -881,7 +881,7 @@ int ft2232_predict_scan_in(int scan_size, enum scan_type type)
 		predicted_size += 1;
 	}
 	
-	//DEBUG("scan_size: %i, predicted_size: %i", scan_size, predicted_size);
+	/* DEBUG("scan_size: %i, predicted_size: %i", scan_size, predicted_size); */
 
 	return predicted_size;
 }
@@ -1198,7 +1198,7 @@ int ft2232_execute_queue()
 					BUFFER_ADD = 0x0;
 					cur_state = TAP_RTI;
 					i -= (i > 7) ? 7 : i;
-					//DEBUG("added TMS scan (no read)");
+					/* DEBUG("added TMS scan (no read)"); */
 				}
 				if (cmd->cmd.runtest->end_state != -1)
 					ft2232_end_state(cmd->cmd.runtest->end_state);
@@ -1211,7 +1211,7 @@ int ft2232_execute_queue()
 					/* TMS data bits */
 					BUFFER_ADD = TAP_MOVE(cur_state, end_state);
 					cur_state = end_state;
-					//DEBUG("added TMS scan (no read)");
+					/* DEBUG("added TMS scan (no read)"); */
 				}
 				require_send = 1;
 #ifdef _DEBUG_JTAG_IO_				
@@ -1236,7 +1236,7 @@ int ft2232_execute_queue()
 				BUFFER_ADD = 0x6;
 				/* TMS data bits */
 				BUFFER_ADD = TAP_MOVE(cur_state, end_state);
-				//DEBUG("added TMS scan (no read)");
+				/* DEBUG("added TMS scan (no read)"); */
 				cur_state = end_state;
 				require_send = 1;
 #ifdef _DEBUG_JTAG_IO_				
@@ -1290,7 +1290,7 @@ int ft2232_execute_queue()
 					first_unsent = cmd;
 				}
 				ft2232_expect_read += ft2232_predict_scan_in(scan_size, type);
-				//DEBUG("new read size: %i", ft2232_expect_read);
+				/* DEBUG("new read size: %i", ft2232_expect_read); */
 				if (cmd->cmd.scan->end_state != -1)
 					ft2232_end_state(cmd->cmd.scan->end_state);
 				ft2232_add_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size);
diff --git a/src/jtag/gw16012.c b/src/jtag/gw16012.c
index c634df31..819cb513 100644
--- a/src/jtag/gw16012.c
+++ b/src/jtag/gw16012.c
@@ -30,7 +30,7 @@
 #endif
 
 /* system includes */
-// -ino: 060521-1036
+/*  -ino: 060521-1036 */
 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
 
 #include <sys/types.h>
diff --git a/src/jtag/parport.c b/src/jtag/parport.c
index 1c37fd8f..811b4bc2 100644
--- a/src/jtag/parport.c
+++ b/src/jtag/parport.c
@@ -27,7 +27,7 @@
 #include "bitbang.h"
 
 /* system includes */
-// -ino: 060521-1036
+/* -ino: 060521-1036 */
 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
 
 #include <sys/types.h>
@@ -189,7 +189,7 @@ int parport_read(void)
 		return 0;
 }
 
-static inline void parport_write_data(void)
+static __inline__ void parport_write_data(void)
 {
 	u8 output;
 	output = dataport_value ^ cable->OUTPUT_INVERT;
diff --git a/src/jtag/presto.c b/src/jtag/presto.c
index 1e21c22b..624f1c7a 100644
--- a/src/jtag/presto.c
+++ b/src/jtag/presto.c
@@ -161,7 +161,7 @@ int presto_write(u8 *buf, int size, u32* bytes_written)
 	}
 	else
 	{
-		*bytes_written = retval;
+		*bytes_written = presto->retval; /* FIXME: Correct? */
 		return ERROR_OK;	
 	}
 #endif
@@ -197,7 +197,7 @@ int presto_read(u8* buf, int size, u32* bytes_read)
 			ERROR("ftdi_read_data: %s", ftdi_get_error_string(&presto->ftdic));
 			return ERROR_JTAG_DEVICE_ERROR;
 		}
-		*bytes_read += retval;
+		*bytes_read += presto->retval; /* FIXME: Correct? */
 	}
 #endif
 
diff --git a/src/jtag/usbprog.c b/src/jtag/usbprog.c
index ba43aa4c..d2a734b4 100644
--- a/src/jtag/usbprog.c
+++ b/src/jtag/usbprog.c
@@ -270,13 +270,13 @@ void usbprog_path_move(pathmove_command_t *cmd)
 	{
 		if (tap_transitions[cur_state].low == cmd->path[state_count])
 		{
-			//INFO("1");
+			/* INFO("1"); */
 			usbprog_write(0, 0, 0);
 			usbprog_write(1, 0, 0);
 		}
 		else if (tap_transitions[cur_state].high == cmd->path[state_count])
 		{
-			//INFO("2");
+			/* INFO("2"); */
 			usbprog_write(0, 1, 0);
 			usbprog_write(1, 1, 0);
 		}
@@ -314,7 +314,7 @@ void usbprog_runtest(int num_cycles)
 	else
 	{
 		usbprog_jtag_tms_send(usbprog_jtag_handle);
-		//INFO("NUM CYCLES %i",num_cycles);
+		/* INFO("NUM CYCLES %i",num_cycles); */
 	}
 
 	for (i = 0; i < num_cycles; i++)
@@ -340,7 +340,7 @@ void usbprog_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size)
 	else
 		usbprog_end_state(TAP_SD);
 
-	//usbprog_jtag_tms_send(usbprog_jtag_handle);
+	/* usbprog_jtag_tms_send(usbprog_jtag_handle); */
 
 	usbprog_state_move();
 	usbprog_end_state(saved_end_state);
@@ -455,7 +455,7 @@ unsigned char usbprog_jtag_message(struct usbprog_jtag *usbprog_jtag, char *msg,
 		return 1;
 	if (res == msglen)
 	{
-		//INFO("HALLLLOOO %i",(int)msg[0]);
+		/* INFO("HALLLLOOO %i",(int)msg[0]); */
 		res =  usb_bulk_read(usbprog_jtag->usb_handle, 0x82, msg, 2, 100);
 		if (res > 0)
 			return (unsigned char)msg[1];
@@ -508,7 +508,7 @@ void usbprog_jtag_write_and_read(struct usbprog_jtag *usbprog_jtag, char * buffe
 
 		if (usb_bulk_write(usbprog_jtag->usb_handle, 3, tmp, 64, 1000) == 64)
 		{
-			//INFO("HALLLLOOO2 %i",(int)tmp[0]);
+			/* INFO("HALLLLOOO2 %i",(int)tmp[0]); */
 			usleep(1);
 			int timeout = 0;
 			while (usb_bulk_read(usbprog_jtag->usb_handle, 0x82, tmp, 64, 1000) < 1)
@@ -556,7 +556,7 @@ void usbprog_jtag_read_tdo(struct usbprog_jtag *usbprog_jtag, char * buffer, int
 
 		usb_bulk_write(usbprog_jtag->usb_handle, 3, tmp, 3, 1000);
 
-		//INFO("HALLLLOOO3 %i",(int)tmp[0]);
+		/* INFO("HALLLLOOO3 %i",(int)tmp[0]); */
 		int timeout = 0;
 		usleep(1);
 		while (usb_bulk_read(usbprog_jtag->usb_handle, 0x82, tmp, 64, 10) < 1)
@@ -592,7 +592,7 @@ void usbprog_jtag_write_tdi(struct usbprog_jtag *usbprog_jtag, char * buffer, in
 		{
 			send_bits = size;
 			loops = size/8;
-			//if(loops==0)
+			/* if(loops==0) */
 			loops++;
 			size = 0;
 		}
@@ -672,7 +672,7 @@ void usbprog_jtag_tms_collect(char tms_scan)
 void usbprog_jtag_tms_send(struct usbprog_jtag *usbprog_jtag)
 {
 	int i;
-	//INFO("TMS SEND");
+	/* INFO("TMS SEND"); */
 	if (tms_chain_index > 0)
 	{
 		char tmp[tms_chain_index + 2];
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 85068a11..f117a480 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -404,14 +404,15 @@ static void arm11_on_enter_debug_state(arm11_common_t * arm11)
 
     arm11_write_DSCR(arm11, new_dscr);
 
-//    jtag_execute_queue();
+    /* jtag_execute_queue(); */
 
 
+/*
+    DEBUG("SAVE DSCR %08x", R(DSCR));
 
-//    DEBUG("SAVE DSCR %08x", R(DSCR));
-
-//    if (R(DSCR) & ARM11_DSCR_WDTR_FULL)
-//	DEBUG("SAVE wDTR %08x", R(WDTR));
+    if (R(DSCR) & ARM11_DSCR_WDTR_FULL)
+	DEBUG("SAVE wDTR %08x", R(WDTR));
+*/
 
 
     /* From the spec:
@@ -424,7 +425,7 @@ static void arm11_on_enter_debug_state(arm11_common_t * arm11)
     while (1)
     {
 	/* MRC p14,0,R0,c5,c10,0 */
-//	arm11_run_instr_no_data1(arm11, /*0xee150e1a*/0xe320f000);
+	/* arm11_run_instr_no_data1(arm11, /*0xee150e1a*/0xe320f000); */
 
 	/* mcr     15, 0, r0, cr7, cr10, {4} */
 	arm11_run_instr_no_data1(arm11, 0xee070f9a);
@@ -501,7 +502,7 @@ static void arm11_on_enter_debug_state(arm11_common_t * arm11)
 	arm11->reg_values[ARM11_RC_PC] -= 8;
     }
 
-//    DEBUG("SAVE PC   %08x", R(PC));
+    /* DEBUG("SAVE PC   %08x", R(PC)); */
 
     arm11_run_instr_data_finish(arm11);
 
@@ -557,7 +558,7 @@ void arm11_leave_debug_state(arm11_common_t * arm11)
 	/* MRC p14,0,r?,c0,c5,0 */
 	arm11_run_instr_data_to_core1(arm11, 0xee100e15 | (i << 12), R(RX + i));
 
-//	DEBUG("RESTORE R%d %08x", i, R(RX + i));
+	/* DEBUG("RESTORE R%d %08x", i, R(RX + i)); */
     }}
 
     arm11_run_instr_data_finish(arm11);
@@ -762,8 +763,10 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
 {
     FNC_INFO;
 
-//    DEBUG("current %d  address %08x  handle_breakpoints %d  debug_execution %d",
-//	current, address, handle_breakpoints, debug_execution);
+/*
+    DEBUG("current %d  address %08x  handle_breakpoints %d  debug_execution %d",
+	current, address, handle_breakpoints, debug_execution);
+*/
 
     arm11_common_t * arm11 = target->arch_info;
 
@@ -948,7 +951,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
 	arm11_on_enter_debug_state(arm11);
     }
 
-//    target->state		= TARGET_HALTED;
+    /* target->state		= TARGET_HALTED; */
     target->debug_reason	= DBG_REASON_SINGLESTEP;
 
     target_call_event_callbacks(target, TARGET_EVENT_HALTED);
@@ -1447,7 +1450,7 @@ int arm11_set_reg(reg_t *reg, u8 *buf)
 
     target_t * target = ((arm11_reg_state_t *)reg->arch_info)->target;
     arm11_common_t *arm11 = target->arch_info;
-//    const arm11_reg_defs_t * arm11_reg_info = arm11_reg_defs + ((arm11_reg_state_t *)reg->arch_info)->def_index;
+    /* const arm11_reg_defs_t * arm11_reg_info = arm11_reg_defs + ((arm11_reg_state_t *)reg->arch_info)->def_index; */
 
     arm11->reg_values[((arm11_reg_state_t *)reg->arch_info)->def_index] = buf_get_u32(buf, 0, 32);
     reg->valid	= 1;
@@ -1479,8 +1482,8 @@ void arm11_build_reg_cache(target_t *target)
     reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
     (*cache_p) = cache;
 
-//    armv7m->core_cache = cache;
-//    armv7m->process_context = cache;
+    /* armv7m->core_cache = cache; */
+    /* armv7m->process_context = cache; */
 
     size_t i;
 
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 2528f107..3bd50cd6 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -217,7 +217,7 @@ int armv4_5_get_core_reg(reg_t *reg)
 		return ERROR_TARGET_NOT_HALTED;
 	}
 	
-	//retval = armv4_5->armv4_5_common->full_context(target);
+	/* retval = armv4_5->armv4_5_common->full_context(target); */
 	retval = armv4_5->armv4_5_common->read_core_reg(target, armv4_5->num, armv4_5->mode);
 	
 	return retval;
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 2f82a6f1..6a8119a0 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -63,7 +63,7 @@ char* armv7m_core_reg_list[] =
 	"sp", "lr", "pc",
 	"xPSR", "msp", "psp",
 	/* Registers accessed through MSR instructions */
-//	"apsr", "iapsr", "ipsr", "epsr",
+	/* "apsr", "iapsr", "ipsr", "epsr", */
 	"primask", "basepri", "faultmask", "control"
 };
 
@@ -74,7 +74,7 @@ char* armv7m_core_dbgreg_list[] =
 	"sp", "lr", "pc",
 	"xPSR", "msp", "psp",
 	/* Registers accessed through MSR instructions */
-//	"dbg_apsr", "iapsr", "ipsr", "epsr",
+	/* "dbg_apsr", "iapsr", "ipsr", "epsr", */
 	"primask", "basepri", "faultmask", "dbg_control"
 };
 
@@ -110,10 +110,12 @@ armv7m_core_reg_t armv7m_core_reg_list_arch_info[] =
 	{18, ARMV7M_REGISTER_CORE_GP, ARMV7M_MODE_ANY, NULL, NULL}, /* PSP */
 
 	/*  CORE_SP are accesible using MSR and MRS instructions */
+#if 0
 //	{0x00, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* APSR */
 //	{0x01, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* IAPSR */
 //	{0x05, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* IPSR */
 //	{0x06, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* EPSR */
+#endif
 
 	{0x10, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* PRIMASK */
 	{0x11, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* BASEPRI */
@@ -332,7 +334,7 @@ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_
 	{
 		if (i < ARMV7NUMCOREREGS)
 			(*reg_list)[i] = &armv7m->process_context->reg_list[i];
-			//(*reg_list)[i] = &armv7m->core_cache->reg_list[i];
+			/* (*reg_list)[i] = &armv7m->core_cache->reg_list[i]; */
 		else
 			(*reg_list)[i] = &armv7m_gdb_dummy_fp_reg;
 	}
@@ -344,7 +346,7 @@ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_
 
 int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info)
 {
-	// get pointers to arch-specific information
+	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	armv7m_algorithm_t *armv7m_algorithm_info = arch_info;
 	enum armv7m_state core_state = armv7m->core_state;
diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 946264c4..e897fc44 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -104,9 +104,11 @@ typedef struct armv7m_common_s
 	
 	void (*change_to_arm)(target_t *target, u32 *r0, u32 *pc);
 	
-//	void (*read_core_regs)(target_t *target, u32 mask, u32 *core_regs[16]);
-//	void (*read_core_regs_target_buffer)(target_t *target, u32 mask, void *buffer, int size);
-//	void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]);
+/*
+	void (*read_core_regs)(target_t *target, u32 mask, u32 *core_regs[16]);
+	void (*read_core_regs_target_buffer)(target_t *target, u32 mask, void *buffer, int size);
+	void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]);
+*/
 
 /*
 	void (*write_xpsr_im8)(target_t *target, u8 xpsr_im, int rot, int spsr);
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index 3a567aba..91911f9e 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -639,7 +639,7 @@ int cortex_m3_resume(struct target_s *target, int current, u32 address, int hand
 	return ERROR_OK;
 }
 
-//int irqstepcount=0;
+/* int irqstepcount=0; */
 int cortex_m3_step(struct target_s *target, int current, u32 address, int handle_breakpoints)
 {
 	/* get pointers to arch-specific information */
@@ -1134,7 +1134,7 @@ int cortex_m3_load_core_reg_u32(struct target_s *target, enum armv7m_regtype typ
 			ERROR("JTAG failure %i",retval);
 			return ERROR_JTAG_DEVICE_ERROR;
 		}
-		//DEBUG("load from core reg %i  value 0x%x",num,*value);
+		/* DEBUG("load from core reg %i  value 0x%x",num,*value); */
 	}
 	else if (type == ARMV7M_REGISTER_CORE_SP) /* Special purpose core register */
 	{
@@ -1468,7 +1468,7 @@ int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, in
 	armv7m->arch_info = cortex_m3;
 	armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;
 	armv7m->store_core_reg_u32 = cortex_m3_store_core_reg_u32;
-//	armv7m->full_context = cortex_m3_full_context;
+	/* armv7m->full_context = cortex_m3_full_context; */
 	
 	target_register_timer_callback(cortex_m3_handle_target_request, 1, 1, target);
 	
diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h
index d04923f9..236911f5 100644
--- a/src/target/cortex_m3.h
+++ b/src/target/cortex_m3.h
@@ -134,7 +134,7 @@ typedef struct  cortex_m3_dwt_comparator_s
 typedef struct cortex_m3_common_s
 {
 	int common_magic;
-//	int (*full_context)(struct target_s *target);
+	/* int (*full_context)(struct target_s *target); */
 
 	arm_jtag_t jtag_info;
 	
diff --git a/src/target/cortex_swjdp.c b/src/target/cortex_swjdp.c
index 81ff6f99..6f267907 100644
--- a/src/target/cortex_swjdp.c
+++ b/src/target/cortex_swjdp.c
@@ -327,13 +327,13 @@ int ahbap_setup_accessport(swjdp_common_t *swjdp, u32 csw, u32 tar)
 	csw = csw | CSW_DBGSWENABLE | CSW_MASTER_DEBUG | CSW_HPROT;
 	if (csw != swjdp->ap_csw_value)
 	{
-		//DEBUG("swjdp : Set CSW %x",csw);
+		/* DEBUG("swjdp : Set CSW %x",csw); */
 		ahbap_write_reg_u32(swjdp, AHBAP_CSW, csw ); 
 		swjdp->ap_csw_value = csw;
 	}
 	if (tar != swjdp->ap_tar_value)
 	{
-		//DEBUG("swjdp : Set TAR %x",tar);
+		/* DEBUG("swjdp : Set TAR %x",tar); */
 		ahbap_write_reg_u32(swjdp, AHBAP_TAR, tar );
 		swjdp->ap_tar_value = tar;
 	}
diff --git a/src/target/cortex_swjdp.h b/src/target/cortex_swjdp.h
index ad6c69a6..99dae691 100644
--- a/src/target/cortex_swjdp.h
+++ b/src/target/cortex_swjdp.h
@@ -98,9 +98,9 @@ typedef struct swjdp_common_s
 
 /* Internal functions used in the module, partial transactions, use with caution */
 extern int swjdp_write_dpacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr);
-//extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr);
+/* extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr); */
 extern int swjdp_read_dpacc(swjdp_common_t *swjdp, u32 *value, u8 reg_addr);
-//extern int swjdp_read_apacc(swjdp_common_t *swjdp, u32 *value, u8 reg_addr);
+/* extern int swjdp_read_apacc(swjdp_common_t *swjdp, u32 *value, u8 reg_addr); */
 extern int ahbap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, u8* out_value_buf);
 extern int ahbap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, u8 *in_value_buf);