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author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-01 18:10:26 +0000 |
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committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-01 18:10:26 +0000 |
commit | 2ce5ca9f0ea5a4cbb7e826f74e3f826de65bcc36 (patch) | |
tree | 7d0f03aa5d3e0a9551e662c28eda1dd8172c24cc /src | |
parent | 63e90b092aab8c3f5beca92de82b1b72d328dedf (diff) | |
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backed out jtag_add_shift()
git-svn-id: svn://svn.berlios.de/openocd/trunk@421 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src')
-rw-r--r-- | src/target/arm7_9_common.c | 25 | ||||
-rw-r--r-- | src/target/embeddedice.c | 40 |
2 files changed, 43 insertions, 22 deletions
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 3c995a23..dd713b9b 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -2164,28 +2164,11 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe armv4_5->core_state = ARMV4_5_STATE_ARM; arm7_9_resume(target, 0, arm7_9->dcc_working_area->address, 1, 1); - - int little=target->endianness==TARGET_LITTLE_ENDIAN; - if (count>2) - { - /* Handle first & last using standard embeddedice_write_reg and the middle ones w/the - core function repeated. - */ - embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little)); - buffer+=4; - for (i = 1; i < count - 1; i++) - { - embeddedice_write_reg_inner(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little)); - buffer += 4; - } - embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little)); - } else + + for (i = 0; i < count; i++) { - for (i = 0; i < count; i++) - { - embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little)); - buffer += 4; - } + embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], target_buffer_get_u32(target, buffer)); + buffer += 4; } target->type->halt(target); diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c index 30258270..333c1c46 100644 --- a/src/target/embeddedice.c +++ b/src/target/embeddedice.c @@ -374,6 +374,11 @@ int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf) int embeddedice_write_reg(reg_t *reg, u32 value) { embeddedice_reg_t *ice_reg = reg->arch_info; + u8 reg_addr = ice_reg->addr & 0x1f; + scan_field_t fields[3]; + u8 field0_out[4]; + u8 field1_out[1]; + u8 field2_out[1]; DEBUG("%i: 0x%8.8x", ice_reg->addr, value); @@ -381,8 +386,41 @@ int embeddedice_write_reg(reg_t *reg, u32 value) arm_jtag_scann(ice_reg->jtag_info, 0x2); arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL); + + fields[0].device = ice_reg->jtag_info->chain_pos; + fields[0].num_bits = 32; + fields[0].out_value = field0_out; + buf_set_u32(fields[0].out_value, 0, 32, value); + fields[0].out_mask = NULL; + fields[0].in_value = NULL; + fields[0].in_check_value = NULL; + fields[0].in_check_mask = NULL; + fields[0].in_handler = NULL; + fields[0].in_handler_priv = NULL; + + fields[1].device = ice_reg->jtag_info->chain_pos; + fields[1].num_bits = 5; + fields[1].out_value = field1_out; + buf_set_u32(fields[1].out_value, 0, 5, reg_addr); + fields[1].out_mask = NULL; + fields[1].in_value = NULL; + fields[1].in_check_value = NULL; + fields[1].in_check_mask = NULL; + fields[1].in_handler = NULL; + fields[1].in_handler_priv = NULL; - embeddedice_write_reg_inner(reg, value); + fields[2].device = ice_reg->jtag_info->chain_pos; + fields[2].num_bits = 1; + fields[2].out_value = field2_out; + buf_set_u32(fields[2].out_value, 0, 1, 1); + fields[2].out_mask = NULL; + fields[2].in_value = NULL; + fields[2].in_check_value = NULL; + fields[2].in_check_mask = NULL; + fields[2].in_handler = NULL; + fields[2].in_handler_priv = NULL; + + jtag_add_dr_scan(3, fields, -1); return ERROR_OK; } |