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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-07 18:14:46 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-07 18:14:46 -0800 |
| commit | 456ec016c2403ed95e0b8b33534ab53ed41d7c27 (patch) | |
| tree | b38b5e3d83c367f6d0737dcccd0d6221466fc960 /src | |
| parent | 81aec6be045792f3ed6a2d8fdbf1f534993b5c14 (diff) | |
| download | openocd+libswd-456ec016c2403ed95e0b8b33534ab53ed41d7c27.tar.gz openocd+libswd-456ec016c2403ed95e0b8b33534ab53ed41d7c27.tar.bz2 openocd+libswd-456ec016c2403ed95e0b8b33534ab53ed41d7c27.tar.xz openocd+libswd-456ec016c2403ed95e0b8b33534ab53ed41d7c27.zip | |
ARM: cope with stupidheaded compiler
Some versions of GCC don't understand that if you mask with 0x3
then have cases 0-3, it's not possible for a variable assigned in
all those branches to have no value at end-of-case. Feh.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/arm_disassembler.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index e76e3859..407d2904 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -135,7 +135,7 @@ static int evaluate_srs(uint32_t opcode, uint32_t address, struct arm_instruction *instruction) { const char *wback = (opcode & (1 << 21)) ? "!" : ""; - const char *mode; + const char *mode = ""; switch ((opcode >> 23) & 0x3) { case 0: @@ -143,7 +143,6 @@ static int evaluate_srs(uint32_t opcode, break; case 1: /* "IA" is default */ - mode = ""; break; case 2: mode = "DB"; |