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author | mifi <mifi@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-01 19:13:05 +0000 |
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committer | mifi <mifi@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-01 19:13:05 +0000 |
commit | 542df344112808c700940769d3f5ab134a0e1e75 (patch) | |
tree | 462bb70c9554d66cb98e01156b2a10e355a31acf /src | |
parent | 290d00e649ca7f2faab928571ff05b90c4ef13f5 (diff) | |
download | openocd+libswd-542df344112808c700940769d3f5ab134a0e1e75.tar.gz openocd+libswd-542df344112808c700940769d3f5ab134a0e1e75.tar.bz2 openocd+libswd-542df344112808c700940769d3f5ab134a0e1e75.tar.xz openocd+libswd-542df344112808c700940769d3f5ab134a0e1e75.zip |
- removed warnings "xxxxx" might be used uninitialized in this function (arm_simulator.c)
- some cosmetic changes
git-svn-id: svn://svn.berlios.de/openocd/trunk@423 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src')
-rw-r--r-- | src/helper/options.c | 2 | ||||
-rw-r--r-- | src/openocd.c | 1 | ||||
-rw-r--r-- | src/target/arm_simulator.c | 4 |
3 files changed, 4 insertions, 3 deletions
diff --git a/src/helper/options.c b/src/helper/options.c index b037a5ed..23b0a637 100644 --- a/src/helper/options.c +++ b/src/helper/options.c @@ -115,7 +115,7 @@ int parse_cmdline_args(struct command_context_s *cmd_ctx, int argc, char *argv[] OUTPUT("--help | -h\tdisplay this help\n"); OUTPUT("--version | -v\tdisplay OpenOCD version\n"); OUTPUT("--file | -f\tuse configuration file <name>\n"); - OUTPUT("--search | -s\tdir to search for config files and scripts.\n"); + OUTPUT("--search | -s\tdir to search for config files and scripts\n"); OUTPUT("--debug | -d\tset debug level <0-3>\n"); OUTPUT("--log_output | -l\tredirect log output to file <name>\n"); OUTPUT("--command | -c\trun <command>\n"); diff --git a/src/openocd.c b/src/openocd.c index 43be9af5..fac385a1 100644 --- a/src/openocd.c +++ b/src/openocd.c @@ -152,3 +152,4 @@ int main(int argc, char *argv[]) return EXIT_SUCCESS; } + diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c index 4ed05586..b47606d6 100644 --- a/src/target/arm_simulator.c +++ b/src/target/arm_simulator.c @@ -32,7 +32,7 @@ u32 arm_shift(u8 shift, u32 Rm, u32 shift_amount, u8 *carry) { - u32 return_value; + u32 return_value = 0; shift_amount &= 0xff; if (shift == 0x0) /* LSL */ @@ -466,7 +466,7 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc) /* load register instructions */ else if ((instruction.type >= ARM_LDR) && (instruction.type <= ARM_LDRSH)) { - u32 load_address, modified_address, load_value; + u32 load_address = 0, modified_address = 0, load_value; u32 Rn = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, instruction.info.load_store.Rn).value, 0, 32); /* adjust Rn in case the PC is being read */ |