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| author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-15 23:48:32 +0000 |
|---|---|---|
| committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-15 23:48:32 +0000 |
| commit | 84e86e9aee9f38f31769be53a5d0b794648ccb5c (patch) | |
| tree | 17d079a80094332e09823734991a92d604b55595 /src | |
| parent | d2088f0d2954d9ae798325b2e8922277372e4725 (diff) | |
| download | openocd+libswd-84e86e9aee9f38f31769be53a5d0b794648ccb5c.tar.gz openocd+libswd-84e86e9aee9f38f31769be53a5d0b794648ccb5c.tar.bz2 openocd+libswd-84e86e9aee9f38f31769be53a5d0b794648ccb5c.tar.xz openocd+libswd-84e86e9aee9f38f31769be53a5d0b794648ccb5c.zip | |
David Brownell <david-b@pacbell.net>:
Print old-style Thumb NOP instructions as such. (GCC uses "mov r8, r8"
instead of the architected NOP which is new in Thumb2.)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2536 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/arm_disassembler.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 1ea882d0..218233ae 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -1512,6 +1512,7 @@ int evaluate_data_proc_thumb(uint16_t opcode, uint32_t address, arm_instruction_ { uint8_t high_reg, op, Rm, Rd,H1,H2; char *mnemonic = NULL; + bool nop = false; high_reg = (opcode & 0x0400) >> 10; op = (opcode & 0x03C0) >> 6; @@ -1546,6 +1547,8 @@ int evaluate_data_proc_thumb(uint16_t opcode, uint32_t address, arm_instruction_ case 0x2: instruction->type = ARM_MOV; mnemonic = "MOV"; + if (Rd == Rm) + nop = true; break; case 0x3: if ((opcode & 0x7) == 0x0) @@ -1671,9 +1674,15 @@ int evaluate_data_proc_thumb(uint16_t opcode, uint32_t address, arm_instruction_ } } - snprintf(instruction->text, 128, - "0x%8.8" PRIx32 " 0x%4.4x \t%s\tr%i, r%i", - address, opcode, mnemonic, Rd, Rm); + if (nop) + snprintf(instruction->text, 128, + "0x%8.8" PRIx32 " 0x%4.4x \tNOP\t\t\t" + "; (%s r%i, r%i)", + address, opcode, mnemonic, Rd, Rm); + else + snprintf(instruction->text, 128, + "0x%8.8" PRIx32 " 0x%4.4x \t%s\tr%i, r%i", + address, opcode, mnemonic, Rd, Rm); return ERROR_OK; } |