David Claffey <dnclaffey@gmail.com>:

This patch helps fix MIPS big endian (elf32-tradbigmips) targets.
If "-endian big" is not set in target create, the endianess defaults to
little.  mw and md commands will still work, but binary file loads will
have the incorrect word order loaded into memory.

The EJTAG processor access data register (PrAcc) is little endian
regardless of the CPU endianness; it is always loaded LSB first. This
is confirmed by the fact that mips_ejtag_drscan_32() uses buf_set_u32()
to load the scan field; buf_set_u32() is a little-endian formatter. For
big endian targets, data buffers have to be modified so the LSB of each
u32 or u16 is at the lower (first) memory location.  If the drscan
out_value word order is set using buf_set_u32() then it makes sense to
also fixup the in_value with buf_get_u32(); a symmetry argument. This
has no affect on little endian hosts.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2219 b42882b7-edfa-0310-969c-e2dbd0fdcd60

2 files changed, 61 insertions, 10 deletions

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 2394b00c..4c8010b5 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -118,7 +118,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
 	if (tap==NULL)
 		return ERROR_FAIL;
 	scan_field_t field;
-	u8 t[4];
+	u8 t[4], r[4];
 	int retval;
 
 	field.tap = tap;
@@ -126,7 +126,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
 	field.out_value = t;
 	buf_set_u32(field.out_value, 0, field.num_bits, *data);
 
-	field.in_value = (u8*)data;
+	field.in_value = r;
 	
 	
 	
@@ -139,6 +139,8 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
 		return retval;
 	}
 
+	*data = buf_get_u32(field.in_value, 0, 32);
+
 	keep_alive();
 
 	return ERROR_OK;
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 5e98a2a0..b271efe1 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -732,6 +732,7 @@ int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 cou
 {
 	mips32_common_t *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	int retval;
 
 	LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
 
@@ -755,22 +756,46 @@ int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 cou
 		case 1:
 			/* if noDMA off, use DMAACC mode for memory read */
 			if(ejtag_info->impcode & EJTAG_IMP_NODMA)
-				return mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+				retval = mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer);
 			else
-				return mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+				retval = mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+			break;
 		default:
 			LOG_ERROR("BUG: we shouldn't get here");
 			exit(-1);
 			break;
 	}
 
-	return ERROR_OK;
+	/* TAP data register is loaded LSB first (little endian) */
+	if (target->endianness == TARGET_BIG_ENDIAN) 
+	{
+		u32 i, t32;
+		u16 t16;
+
+		for(i = 0; i < (count*size); i += size)
+		{
+			switch(size)
+			{
+				case 4:
+					t32 = le_to_h_u32(&buffer[i]);
+					h_u32_to_be(&buffer[i], t32);
+					break;
+				case 2:
+					t16 = le_to_h_u16(&buffer[i]);
+					h_u16_to_be(&buffer[i], t16);
+					break;
+			}
+		}
+	}
+	
+	return retval;
 }
 
 int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
 {
 	mips32_common_t *mips32 = target->arch_info;
 	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	int retval;
 
 	LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
 
@@ -793,10 +818,6 @@ int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 co
 		case 2:
 		case 1:
 			/* if noDMA off, use DMAACC mode for memory write */
-			if(ejtag_info->impcode & EJTAG_IMP_NODMA)
-				mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
-			else
-				mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
 			break;
 		default:
 			LOG_ERROR("BUG: we shouldn't get here");
@@ -804,7 +825,35 @@ int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 co
 			break;
 	}
 
-	return ERROR_OK;
+	/* TAP data register is loaded LSB first (little endian) */
+	if (target->endianness == TARGET_BIG_ENDIAN)
+	{
+		u32 i, t32;
+		u16 t16;
+
+		for(i = 0; i < (count*size); i += size)
+		{
+			switch(size) 
+			{
+				case 4:
+					t32 = be_to_h_u32(&buffer[i]);
+					h_u32_to_le(&buffer[i], t32);
+					break;
+				case 2:
+					t16 = be_to_h_u16(&buffer[i]);
+					h_u16_to_le(&buffer[i], t16);
+					break;
+			}
+		}
+	}	   
+
+	if(ejtag_info->impcode & EJTAG_IMP_NODMA)
+		retval = mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
+	else
+		retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
+	
+
+	return retval;
 }
 
 int mips_m4k_register_commands(struct command_context_s *cmd_ctx)