- add support for different TAR autotincrement sizes as per ARM ADI spec.

- set TAR size to 12 bits for Cortex-M3.
- Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu].


git-svn-id: svn://svn.berlios.de/openocd/trunk@2051 b42882b7-edfa-0310-969c-e2dbd0fdcd60

3 files changed, 34 insertions, 12 deletions

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 251f2581..60951852 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -52,6 +52,18 @@
  * are immediatley available.
 */
 
+
+/* ARM ADI Specification requires at least 10 bits used for TAR autoincrement  */
+
+/*
+	u32 tar_block_size(u32 address)
+	Return the largest block starting at address that does not cross a tar block size alignment boundary
+*/
+static u32 max_tar_block_size(u32 tar_autoincr_block, u32 address)
+{
+	return (tar_autoincr_block - ((tar_autoincr_block - 1) & address)) >> 2;
+}
+
 /***************************************************************************
  *                                                                         *
  * DPACC and APACC scanchain access through JTAG-DP                        *
@@ -467,8 +479,8 @@ int mem_ap_write_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addre
 
 	while (wcount > 0)
 	{
-		/* Adjust to write blocks within 4K aligned boundaries */
-		blocksize = (0x1000 - (0xFFF & address)) >> 2;
+		/* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/
+		blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
 		if (wcount < blocksize)
 			blocksize = wcount;
 
@@ -517,8 +529,8 @@ int mem_ap_write_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u3
 	{
 		int nbytes;
 
-		/* Adjust to read within 4K block boundaries */
-		blocksize = (0x1000 - (0xFFF & address)) >> 1;
+		/* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/
+		blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
 
 		if (wcount < blocksize)
 			blocksize = wcount;
@@ -613,8 +625,8 @@ int mem_ap_write_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32
 	{
 		int nbytes;
 
-		/* Adjust to read within 4K block boundaries */
-		blocksize = (0x1000 - (0xFFF & address));
+		/* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/
+		blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
 
 		if (wcount < blocksize)
 			blocksize = wcount;
@@ -710,8 +722,8 @@ int mem_ap_read_buf_u32(swjdp_common_t *swjdp, u8 *buffer, int count, u32 addres
 
 	while (wcount > 0)
 	{
-		/* Adjust to read within 4K block boundaries */
-		blocksize = (0x1000 - (0xFFF & address)) >> 2;
+		/* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
+		blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
 		if (wcount < blocksize)
 			blocksize = wcount;
 
@@ -784,8 +796,8 @@ int mem_ap_read_buf_packed_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32
 	{
 		int nbytes;
 
-		/* Adjust to read within 4K block boundaries */
-		blocksize = (0x1000 - (0xFFF & address)) >> 1;
+		/* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
+		blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
 		if (wcount < blocksize)
 			blocksize = wcount;
 
@@ -879,8 +891,8 @@ int mem_ap_read_buf_packed_u8(swjdp_common_t *swjdp, u8 *buffer, int count, u32
 	{
 		int nbytes;
 
-		/* Adjust to read within 4K block boundaries */
-		blocksize = (0x1000 - (0xFFF & address));
+		/* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
+		blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
 
 		if (wcount < blocksize)
 			blocksize = wcount;
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index 06fe3287..313598b1 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -99,8 +99,17 @@ typedef struct swjdp_common_s
 	u8  ack;
 	/* extra tck clocks for memory bus access */
 	u32	memaccess_tck;
+	/* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */
+	u32 tar_autoincr_block;
+
 } swjdp_common_t;
 
+/* Accessor function for currently selected DAP-AP number */ 
+static inline u8 dap_ap_get_select(swjdp_common_t *swjdp)
+{
+	return (u8)( swjdp ->apsel >> 24);
+}
+
 /* Internal functions used in the module, partial transactions, use with caution */
 extern int dap_dp_write_reg(swjdp_common_t *swjdp, u32 value, u8 reg_addr);
 /* extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr); */
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index 40aadea2..d105fe33 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -1579,6 +1579,7 @@ int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jt
 	armv7m->swjdp_info.ap_tar_value = -1;
 	armv7m->swjdp_info.jtag_info = &cortex_m3->jtag_info;
 	armv7m->swjdp_info.memaccess_tck = 8;
+	armv7m->swjdp_info.tar_autoincr_block = (1<<12);	/* Cortex-M3 has 4096 bytes autoincrement range */
 
 	/* initialize arch-specific breakpoint handling */