update 'flash bank' usage in scripts

Sets $_FLASHNAME to "$_CHIPNAME.flash" and passes it as the
first argument to 'flash bank'.

18 files changed, 46 insertions, 23 deletions

diff --git a/tcl/board/balloon3-cpu.cfg b/tcl/board/balloon3-cpu.cfg
index 8a646b76..ecb1a282 100644
--- a/tcl/board/balloon3-cpu.cfg
+++ b/tcl/board/balloon3-cpu.cfg
@@ -10,4 +10,5 @@ reset_config trst_and_srst separate
 
 # flash bank <driver> <base> <size> <chip_width> <bus_width>
 # 29LV650 64Mbit Flash
-flash bank cfi 0x00000000 0x800000 2 2 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x800000 2 2 0
diff --git a/tcl/board/crossbow_tech_imote2.cfg b/tcl/board/crossbow_tech_imote2.cfg
index a7d12156..88d4aa72 100644
--- a/tcl/board/crossbow_tech_imote2.cfg
+++ b/tcl/board/crossbow_tech_imote2.cfg
@@ -9,4 +9,5 @@ jtag_nsrst_delay 800
 reset_config trst_and_srst separate
 
 # works for P30 flash
-flash bank cfi 0x00000000 0x2000000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x2000000 2 2 $_TARGETNAME
diff --git a/tcl/board/csb337.cfg b/tcl/board/csb337.cfg
index c2c47898..de196604 100644
--- a/tcl/board/csb337.cfg
+++ b/tcl/board/csb337.cfg
@@ -4,7 +4,8 @@
 source [find target/at91rm9200.cfg]
 
 # boots from NOR on CS0:  8 MBytes CFI flash, 16-bit bus
-flash bank cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
 
 # ETM9 trace port connector present on this board, 16 data pins.
 if { [info exists ETM_DRIVER] } {
diff --git a/tcl/board/digi_connectcore_wi-9c.cfg b/tcl/board/digi_connectcore_wi-9c.cfg
index e6d17bdd..3bc26adf 100644
--- a/tcl/board/digi_connectcore_wi-9c.cfg
+++ b/tcl/board/digi_connectcore_wi-9c.cfg
@@ -122,4 +122,5 @@ $_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x1000 -work-a
 
 #M29DW323DB - not working
 #flash bank cfi <base> <size> <chip width> <bus width> <target#>
-flash bank cfi 0x50000000 0x0400000 2 2 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x50000000 0x0400000 2 2 0
diff --git a/tcl/board/hammer.cfg b/tcl/board/hammer.cfg
index ed83803f..d366a45e 100644
--- a/tcl/board/hammer.cfg
+++ b/tcl/board/hammer.cfg
@@ -33,4 +33,5 @@ $_TARGETNAME configure -event reset-init {
 
 #flash configuration
 #flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
-flash bank cfi 0x00000000 0x1000000 2 2 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x1000000 2 2 0
diff --git a/tcl/board/hitex_lpc2929.cfg b/tcl/board/hitex_lpc2929.cfg
index d0b28647..7d06f745 100644
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -28,7 +28,8 @@ $_TARGETNAME configure -event reset-start {
 }
 
 # External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
-flash bank cfi 0x5C000000 0x400000 2 2 $_TARGETNAME jedec_probe
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x5C000000 0x400000 2 2 $_TARGETNAME jedec_probe
 
 
 $_TARGETNAME configure -event reset-init {
diff --git a/tcl/board/hitex_str9-comstick.cfg b/tcl/board/hitex_str9-comstick.cfg
index e7b79616..968d80ec 100644
--- a/tcl/board/hitex_str9-comstick.cfg
+++ b/tcl/board/hitex_str9-comstick.cfg
@@ -68,5 +68,7 @@ $_TARGETNAME configure -event reset-init {
 $_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
 
 #flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank str9x 0x00000000 0x00080000 0 0 0
-flash bank str9x 0x00080000 0x00008000 0 0 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 0
diff --git a/tcl/board/lubbock.cfg b/tcl/board/lubbock.cfg
index 63cc2a41..32af386e 100644
--- a/tcl/board/lubbock.cfg
+++ b/tcl/board/lubbock.cfg
@@ -12,8 +12,10 @@ jtag_ntrst_delay 250
 
 # CS0, CS1 -- two banks of CFI flash, 32 MBytes each
 # each bank is 32-bits wide, two 16-bit chips in parallel
-flash bank cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
-flash bank cfi 0x04000000 0x02000000 2 4 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x04000000 0x02000000 2 4 $_TARGETNAME
 
 # CS2 low -- FPGA registers
 # CS2 high -- 1 MByte SRAM at 0x0a00.0000 ... last 64K for scratch
diff --git a/tcl/board/omap2420_h4.cfg b/tcl/board/omap2420_h4.cfg
index c2190b5c..12efa053 100644
--- a/tcl/board/omap2420_h4.cfg
+++ b/tcl/board/omap2420_h4.cfg
@@ -8,5 +8,7 @@ reset_config trst_and_srst separate
 # Board configs can vary a *LOT* ... parts, jumpers, etc.
 # This GP board boots from cs0 using NOR (2x32M), and also
 # has 64M NAND on cs6.
-flash bank cfi 0x04000000 0x02000000 2 2 $_TARGETNAME
-flash bank cfi 0x06000000 0x02000000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x04000000 0x02000000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x06000000 0x02000000 2 2 $_TARGETNAME
diff --git a/tcl/board/osk5912.cfg b/tcl/board/osk5912.cfg
index d78c6eff..c33ae285 100644
--- a/tcl/board/osk5912.cfg
+++ b/tcl/board/osk5912.cfg
@@ -19,8 +19,10 @@ etm_dummy config $_TARGETNAME
 
 # standard boards populate two 16 MB chips, but manufacturing
 # options or an expansion board could change this config.
-flash bank cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
-flash bank cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
 
 proc osk5912_init {} {
 	omap5912_reset
diff --git a/tcl/board/pxa255_sst.cfg b/tcl/board/pxa255_sst.cfg
index 8bc691ba..ce903871 100644
--- a/tcl/board/pxa255_sst.cfg
+++ b/tcl/board/pxa255_sst.cfg
@@ -13,7 +13,8 @@ source [find target/pxa255.cfg]
 $_TARGETNAME configure -work-area-phys 0x4000000 -work-area-size 0x4000 -work-area-backup 0
 
 # flash bank <driver> <base> <size> <chip_width> <bus_width> <target> [options]
-flash bank cfi 0x00000000 0x80000 2 2 $_TARGETNAME jedec_probe
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x00000000 0x80000 2 2 $_TARGETNAME jedec_probe
 
 proc pxa255_sst_init {} {
 	xscale cp15   15      0x00002001  #Enable CP0 and CP13 access
diff --git a/tcl/board/str910-eval.cfg b/tcl/board/str910-eval.cfg
index fa872a9b..0cf794ae 100644
--- a/tcl/board/str910-eval.cfg
+++ b/tcl/board/str910-eval.cfg
@@ -54,8 +54,10 @@ $_TARGETNAME configure -event reset-init {
 }
 
 #flash bank str9x <base> <size> 0 0 <target#> <variant>
-flash bank str9x 0x00000000 0x00080000 0 0 0
-flash bank str9x 0x00080000 0x00008000 0 0 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 0
 
 # For more information about the configuration files, take a look at:
 # openocd.texi
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index c4e5d67f..0cbdb816 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -54,7 +54,8 @@ proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
 # boots from NOR on CS0:  8 MBytes CFI flash, 16-bit bus
 # it's really 16MB but the upper 8mb is controller via gpio
 # openocd does not support 'complex reads/writes' to NOR
-flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
 
 # writing data to memory does not work without this
 memwrite burst disable
\ No newline at end of file
diff --git a/tcl/board/topas910.cfg b/tcl/board/topas910.cfg
index ce7c87a4..ae72c4b7 100644
--- a/tcl/board/topas910.cfg
+++ b/tcl/board/topas910.cfg
@@ -115,4 +115,5 @@ arm7_9 dcc_downloads enable       # Enable faster DCC downloads
 #####################
 
 #flash bank cfi <base> <size> <chip width> <bus width> <target#>
-flash bank cfi 0x20000000 0x2000000 2 2 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x20000000 0x2000000 2 2 0
diff --git a/tcl/board/topasa900.cfg b/tcl/board/topasa900.cfg
index a8a6caf6..5984f81f 100644
--- a/tcl/board/topasa900.cfg
+++ b/tcl/board/topasa900.cfg
@@ -121,5 +121,6 @@ arm7_9 dcc_downloads enable       # Enable faster DCC downloads
 #####################
 
 #flash bank cfi <base> <size> <chip width> <bus width> <target#>
-flash bank cfi 0x20000000 0x1000000 2 2 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x20000000 0x1000000 2 2 0
 
diff --git a/tcl/board/unknown_at91sam9260.cfg b/tcl/board/unknown_at91sam9260.cfg
index 2abd367f..ad7b13c7 100644
--- a/tcl/board/unknown_at91sam9260.cfg
+++ b/tcl/board/unknown_at91sam9260.cfg
@@ -91,6 +91,7 @@ $_TARGETNAME configure -event reset-init {
 #####################
 
 #flash bank cfi <base> <size> <chip width> <bus width> <target#>
-flash bank cfi 0x10000000 0x01000000 2 2 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 0
 
 
diff --git a/tcl/board/x300t.cfg b/tcl/board/x300t.cfg
index 3b094930..d9141809 100644
--- a/tcl/board/x300t.cfg
+++ b/tcl/board/x300t.cfg
@@ -8,7 +8,8 @@ $_TARGETNAME configure -event reset-init { x300t_init }
 
 # 1MB CFI capable flash
 # flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank cfi 0xac000000 0x100000 2 2 0
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME cfi 0xac000000 0x100000 2 2 0
 
 proc x300t_init { } {
 	# Setup SDRAM config and flash mapping
diff --git a/tcl/board/zy1000.cfg b/tcl/board/zy1000.cfg
index 54bb7bb7..3f526d06 100644
--- a/tcl/board/zy1000.cfg
+++ b/tcl/board/zy1000.cfg
@@ -38,7 +38,8 @@ target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAM
 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable
 
-flash bank ecosflash 0x01000000 0x200000 2 2 $_TARGETNAME ecos/at91eb40a.elf
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME ecosflash 0x01000000 0x200000 2 2 $_TARGETNAME ecos/at91eb40a.elf
 $_TARGETNAME configure -event reset-init {
 	# Set up chip selects & timings
 	mww 0xFFE00000 0x0100273D