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authorDavid Brownell <dbrownell@users.sourceforge.net>2009-11-13 13:44:50 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-11-13 13:44:50 -0800
commit38e8d60f79fd51424c556e07653713254c2d9b4e (patch)
treeec0b8cea908e83bd369f59024e96e0c73d0469a2 /tcl/target/imx35.cfg
parentafe0298399bd06700926822e6d49c5bc44151956 (diff)
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target.cfg: label ETBs correctly
Various cores with an ETB have its TAP misnamed ... either as a boundary scan TAP or as the iMX "Secure JTAG Controller" (which is, among other things, a JRC that could be used to shorten scan chains). Use the correct name for these TAPs, which we can recognize since their IDs were assigned by ARM and these chips all document the presence of an ETB. The 0x2b900f0f is ETB11; the 0x1b900f0f is an older module, just called "ETB". Also shrink the ETB's IR configuration; the default IR-Capture value is fine, and the mask can specify that all four bits are safe to check (per ARM documentation). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'tcl/target/imx35.cfg')
-rw-r--r--tcl/target/imx35.cfg12
1 files changed, 5 insertions, 7 deletions
diff --git a/tcl/target/imx35.cfg b/tcl/target/imx35.cfg
index 32748c5c..b899084f 100644
--- a/tcl/target/imx35.cfg
+++ b/tcl/target/imx35.cfg
@@ -27,17 +27,15 @@ if { [info exists SDMATAPID ] } {
set _SDMATAPID 0x0882601d
}
-#========================================
-# The "system jtag controller"
-# IMX31 reference manual, page 6-28 - figure 6-14
-if { [info exists SJCTAPID ] } {
- set _SJCTAPID $SJCTAPID
+if { [info exists ETBTAPID ] } {
+ set _ETBTAPID $ETBTAPID
} else {
- set _SJCTAPID 0x2b900f0f
+ set _ETBTAPID 0x2b900f0f
}
-jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID
+#========================================
+jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
# No IDCODE for this TAP