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| author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-08-18 10:27:24 +0000 |
|---|---|---|
| committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-08-18 10:27:24 +0000 |
| commit | 7b4428df971378bfc4d762595cdb0e205626eaa9 (patch) | |
| tree | 7a91604ad85c2e8e7ce1cbfc86829d40123e33f1 /tcl/target/lm3s3748.cfg | |
| parent | ed22097a55b4bde80c64c68693bbde19b29818c5 (diff) | |
| download | openocd+libswd-7b4428df971378bfc4d762595cdb0e205626eaa9.tar.gz openocd+libswd-7b4428df971378bfc4d762595cdb0e205626eaa9.tar.bz2 openocd+libswd-7b4428df971378bfc4d762595cdb0e205626eaa9.tar.xz openocd+libswd-7b4428df971378bfc4d762595cdb0e205626eaa9.zip | |
David Brownell <david-b@pacbell.net> Cleanup the Stellaris target configs:
- remove endianness options; these chips hard-wire "little"
- $_TARGETNAME updates:
* don't pass $_TARGETNAME where a TAP label is required
* flash config uses $_TARGETNAME (it might not be target #0)
* simplify one $_TARGETNAME construction
- update work area setup:
* remove VM spec; these chips have no VM!
* fix some wrong sizes (0x4000 == 16K, not 4K)
* simplify: take defaults
- comment fixups
git-svn-id: svn://svn.berlios.de/openocd/trunk@2589 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'tcl/target/lm3s3748.cfg')
| -rw-r--r-- | tcl/target/lm3s3748.cfg | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/tcl/target/lm3s3748.cfg b/tcl/target/lm3s3748.cfg index 47cf72ef..3fdbd798 100644 --- a/tcl/target/lm3s3748.cfg +++ b/tcl/target/lm3s3748.cfg @@ -6,13 +6,6 @@ if { [info exists CHIPNAME] } { set _CHIPNAME lm3s3748 } -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - # this defaults to a little endian - set _ENDIAN little -} - if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID } else { @@ -26,11 +19,10 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUT # parts (third generation, includes LM3S3748). It keeps the debug registers # from being cleared, by using software reset not SRST; NOP on newer revs. set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m3 -endian $_ENDIAN \ - -chain-position $_TARGETNAME -variant lm3s +target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s # 8k working area at base of ram, not backed up $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000 # flash configuration -- one bank of 128K -flash bank stellaris 0 0 0 0 0 +flash bank stellaris 0 0 0 0 $_TARGETNAME |