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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-04 16:51:48 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-04 16:51:48 -0800 |
| commit | 32f961daba1301ac22ed53c9bc0822effff168cf (patch) | |
| tree | c508227e213e3bdc80243214435eeddbd3131d36 /tcl/target/test_reset_syntax_error.cfg | |
| parent | bdde9460b923ab61fad678bf1e3f0da04e1d94ee (diff) | |
| download | openocd+libswd-32f961daba1301ac22ed53c9bc0822effff168cf.tar.gz openocd+libswd-32f961daba1301ac22ed53c9bc0822effff168cf.tar.bz2 openocd+libswd-32f961daba1301ac22ed53c9bc0822effff168cf.tar.xz openocd+libswd-32f961daba1301ac22ed53c9bc0822effff168cf.zip | |
ARM: semihosting entry cleanup
Clean up arm_semihosting() entry a bit, comment some issues and just
which SVC opcodes are getting intercepted. Microcontroller profile
cores will need a new entry, since they use BKPT instead (and don't
have either SVC mode or an SPSR register).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'tcl/target/test_reset_syntax_error.cfg')
0 files changed, 0 insertions, 0 deletions