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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-15 14:39:25 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-15 14:45:26 -0800 |
| commit | 4a2f4e34336dbb662a308e5a881edbba9f3657ec (patch) | |
| tree | 2953a4501b45fc988ffc706d5f560bee7c13d3d2 /tcl/target | |
| parent | 80a757d82eafb36ffd54414f33ce91302f4522da (diff) | |
| download | openocd+libswd-4a2f4e34336dbb662a308e5a881edbba9f3657ec.tar.gz openocd+libswd-4a2f4e34336dbb662a308e5a881edbba9f3657ec.tar.bz2 openocd+libswd-4a2f4e34336dbb662a308e5a881edbba9f3657ec.tar.xz openocd+libswd-4a2f4e34336dbb662a308e5a881edbba9f3657ec.zip | |
more tcl/{board,target} cleanup
Remove more remnants of the old "jtag_device" syntax.
Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity.
Remove various non-supported "-variant" target options; they're not
needed often at all.
Flag some of the board files as needing to have and use target files
for the TAP and target declarations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'tcl/target')
| -rw-r--r-- | tcl/target/ar71xx.cfg | 2 | ||||
| -rw-r--r-- | tcl/target/c100.cfg | 2 | ||||
| -rw-r--r-- | tcl/target/lpc2900.cfg | 2 | ||||
| -rw-r--r-- | tcl/target/tmpa900.cfg | 4 | ||||
| -rw-r--r-- | tcl/target/tmpa910.cfg | 4 |
5 files changed, 7 insertions, 7 deletions
diff --git a/tcl/target/ar71xx.cfg b/tcl/target/ar71xx.cfg index 47bab1e3..20383315 100644 --- a/tcl/target/ar71xx.cfg +++ b/tcl/target/ar71xx.cfg @@ -10,7 +10,7 @@ set CHIPNAME ar71xx jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1 -set TARGETNAME [format "%s.cpu" $CHIPNAME] +set TARGETNAME $CHIPNAME.cpu target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME $TARGETNAME configure -event reset-halt-post { diff --git a/tcl/target/c100.cfg b/tcl/target/c100.cfg index a0a28d80..b175f23f 100644 --- a/tcl/target/c100.cfg +++ b/tcl/target/c100.cfg @@ -35,7 +35,7 @@ jtag newtap $_CHIPNAME dsp -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_D # Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME # C100's ARAM 64k SRAM diff --git a/tcl/target/lpc2900.cfg b/tcl/target/lpc2900.cfg index 2371dd7a..769d39d4 100644 --- a/tcl/target/lpc2900.cfg +++ b/tcl/target/lpc2900.cfg @@ -29,7 +29,7 @@ if { [info exists ETBTAPID ] } { reset_config trst_and_srst separate # Define the _TARGETNAME -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +set _TARGETNAME $_CHIPNAME.cpu # Include the ETB tap controller if asked for. # Has to be done manually for newer devices (not an "old" LPC2917/2919). diff --git a/tcl/target/tmpa900.cfg b/tcl/target/tmpa900.cfg index 80adc652..329e03ca 100644 --- a/tcl/target/tmpa900.cfg +++ b/tcl/target/tmpa900.cfg @@ -39,8 +39,8 @@ jtag_ntrst_delay 20 # Target configuration ###################### -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME # built-in RAM0 #working_area 0 0xf8004000 0x4000 nobackup diff --git a/tcl/target/tmpa910.cfg b/tcl/target/tmpa910.cfg index 4af5e4e8..29d2d6ef 100644 --- a/tcl/target/tmpa910.cfg +++ b/tcl/target/tmpa910.cfg @@ -39,8 +39,8 @@ jtag_ntrst_delay 20 # Target configuration ###################### -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME # built-in RAM0 #working_area 0 0xf8004000 0x4000 nobackup |