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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-01 01:09:10 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-01 01:10:19 -0800 |
| commit | a65e75ea34153a8d0a0fe0b07497ad75c5726ab6 (patch) | |
| tree | a9a73901dc9f6bf6e05171c616729c6b992e26cb /tcl/target | |
| parent | 48edd58c3941c562a5a7ea78432a28e72108bbe4 (diff) | |
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Tcl and doc: update to match new 'arm mcr ...' etc
Make them match the C code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'tcl/target')
| -rw-r--r-- | tcl/target/c100helper.tcl | 8 | ||||
| -rw-r--r-- | tcl/target/imx.cfg | 2 |
2 files changed, 5 insertions, 5 deletions
diff --git a/tcl/target/c100helper.tcl b/tcl/target/c100helper.tcl index 54fe07f0..96588713 100644 --- a/tcl/target/c100helper.tcl +++ b/tcl/target/c100helper.tcl @@ -436,22 +436,22 @@ proc initC100 {} { # */ # mov r0, #0 # mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ - mcr 15 0 7 7 0 0x0 + arm mcr 15 0 7 7 0 0x0 # mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ - mcr 15 0 8 7 0 0x0 + arm mcr 15 0 8 7 0 0x0 # /* # * disable MMU stuff and caches # */ # mrc p15, 0, r0, c1, c0, 0 - mrc 15 0 1 0 0 + arm mrc 15 0 1 0 0 # bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) # bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) # orr r0, r0, #0x00000002 @ set bit 2 (A) Align # orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache # orr r0, r0, #0x00400000 @ set bit 22 (U) # mcr p15, 0, r0, c1, c0, 0 - mcr 15 0 1 0 0 0x401002 + arm mcr 15 0 1 0 0 0x401002 # This is from bsp_init() in u-boot/boards/mindspeed/ooma-darwin/board.c # APB init # // Setting APB Bus Wait states to 1, set post write diff --git a/tcl/target/imx.cfg b/tcl/target/imx.cfg index bfcc6525..547ec56c 100644 --- a/tcl/target/imx.cfg +++ b/tcl/target/imx.cfg @@ -10,7 +10,7 @@ proc setc15 {regs value} { echo [format "set p15 0x%04x, 0x%08x" $regs $value] - mcr 15 [expr ($regs>>12)&0x7] [expr ($regs>>0)&0xf] [expr ($regs>>4)&0xf] [expr ($regs>>8)&0x7] $value + arm mcr 15 [expr ($regs>>12)&0x7] [expr ($regs>>0)&0xf] [expr ($regs>>4)&0xf] [expr ($regs>>8)&0x7] $value } |