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| author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-10 07:21:12 +0000 |
|---|---|---|
| committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-07-10 07:21:12 +0000 |
| commit | e4cff09137466adc615e7e1a705791dfd2266103 (patch) | |
| tree | d68a32c9e0666e1810a315554898df179d4d35ae /tcl/target | |
| parent | 3cf4717a2aacfc197e1b6e84cf5a3391ba5585fb (diff) | |
| download | openocd+libswd-e4cff09137466adc615e7e1a705791dfd2266103.tar.gz openocd+libswd-e4cff09137466adc615e7e1a705791dfd2266103.tar.bz2 openocd+libswd-e4cff09137466adc615e7e1a705791dfd2266103.tar.xz openocd+libswd-e4cff09137466adc615e7e1a705791dfd2266103.zip | |
David Brownell <david-b@pacbell.net> split EK board support out
from the target CPU support .
git-svn-id: svn://svn.berlios.de/openocd/trunk@2504 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'tcl/target')
| -rw-r--r-- | tcl/target/lm3s3748.cfg | 35 |
1 files changed, 11 insertions, 24 deletions
diff --git a/tcl/target/lm3s3748.cfg b/tcl/target/lm3s3748.cfg index 7321cb8a..47cf72ef 100644 --- a/tcl/target/lm3s3748.cfg +++ b/tcl/target/lm3s3748.cfg @@ -1,7 +1,4 @@ -# Script for luminary lm3s3748 -# -# NB! work in progress! Duplicated from lm3s811.cfg, but does -# it need modification?? +# TI/Luminary Stellaris lm3s3748 if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME @@ -19,31 +16,21 @@ if { [info exists ENDIAN] } { if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID } else { - # force an error till we get a good number set _CPUTAPID 0x3ba00477 } -# RCLK -jtag_khz 500 - -jtag_nsrst_delay 100 -jtag_ntrst_delay 100 - -#lm3s3748 Evaluation Board has only srst -reset_config srst_only - -#jtag scan chain +# JTAG scan chain jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID +# The "lm3s" variant works around an erratum when using Rev A of "DustDevil" +# parts (third generation, includes LM3S3748). It keeps the debug registers +# from being cleared, by using software reset not SRST; NOP on newer revs. +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m3 -endian $_ENDIAN \ + -chain-position $_TARGETNAME -variant lm3s -# the luminary variant causes a software reset rather than asserting SRST -# this stops the debug registers from being cleared -# this will be fixed in later revisions of silicon -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME -variant lm3s - -# 8k working area at base of ram -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x2000 -work-area-backup 0 +# 8k working area at base of ram, not backed up +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000 -#flash configuration +# flash configuration -- one bank of 128K flash bank stellaris 0 0 0 0 0 |