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| author | Edgar Grimberg <edgar.grimberg@zylin.com> | 2010-02-02 10:39:52 +0100 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-02 09:30:33 -0800 |
| commit | 503f6139c7ed05339daea8c4984d32840d795222 (patch) | |
| tree | 97dd0ae96d776635f9ce98c73ee53ea450250de2 /tcl | |
| parent | 3d2d5dcc9c27b84dc2e5e9ed53be0f784a450042 (diff) | |
| download | openocd+libswd-503f6139c7ed05339daea8c4984d32840d795222.tar.gz openocd+libswd-503f6139c7ed05339daea8c4984d32840d795222.tar.bz2 openocd+libswd-503f6139c7ed05339daea8c4984d32840d795222.tar.xz openocd+libswd-503f6139c7ed05339daea8c4984d32840d795222.zip | |
flash/str7x: After reset init the flash is unlocked
The default state of the STR7 flash after a reset init is unlocked.
The information in the flash driver now reflects this.
The information about the lock status cannot be read from the
flash chip, so the user is informed that flash info might not
contain accurate information.
[dbrownell@users.sourceforge.net: line length shrinkage]
Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/target/str710.cfg | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/tcl/target/str710.cfg b/tcl/target/str710.cfg index 9da69aca..028c6043 100644 --- a/tcl/target/str710.cfg +++ b/tcl/target/str710.cfg @@ -30,7 +30,15 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi $_TARGETNAME configure -event reset-start { jtag_khz 10 } -$_TARGETNAME configure -event reset-init { jtag_khz 6000 } +$_TARGETNAME configure -event reset-init { + jtag_khz 6000 + +# Because the hardware cannot be interrogated for the protection state +# of sectors, initialize all the sectors to be unprotected. The initial +# state is reflected by the driver, too. + flash protect 0 0 last off + flash protect 1 0 last off +} $_TARGETNAME configure -event gdb-flash-erase-start { flash protect 0 0 7 off flash protect 1 0 1 off |